| Message ID | 20250523-sfg-spifmc-v1-2-4cf16cf3fd2a@gmail.com |
|---|---|
| State | Superseded |
| Headers | show |
| Series | spi: sophgo: Add SPI NOR controller for SG2042 | expand |
Hi, Michael, Thank you for your reviews. On Fri, May 23, 2025 at 01:16:50PM +0200, Michael Walle wrote: > Hi, > > > Add GD25LB512ME SPI-NOR flash information > > Please have a look at [1]. > > This flash supports SFDP, do you really need a new entry in the > flashdb? Could you try without it? > > In any case, could you please dump the SFDP see [1], too. > > [1] https://docs.kernel.org/driver-api/mtd/spi-nor.html > > -michael I was following the testing requirements from [1]. Before that, I have applied the patch: "mtd: spi-nor: Add GD25LB512ME GigaDevice flash_info" Because without this patch, the spi-nor device cannot be detected normally. ------------------------------- LOG ------------------------------------ root@localhost ~ # dmesg | grep -i spi [ 10.199526] spi-nor spi0.0: supply vcc not found, using dummy regulator [ 11.206477] spi-nor spi0.0: unrecognized JEDEC id bytes: c8 67 1a ff c8 67 [ 11.213691] spi-nor spi1.0: supply vcc not found, using dummy regulator [ 12.220614] spi-nor spi1.0: unrecognized JEDEC id bytes: c8 67 1a ff c8 67 root@localhost ~ # cat /sys/bus/spi/devices/spi0.0/spi-nor/partname cat: /sys/bus/spi/devices/spi0.0/spi-nor/partname: No such file or directory Testing output atfer that patch: ------------------------------------------------------------------------ This flash is populated on the SG2042 Pioneer board and was tested at 100MHz frequency using the spi-sg2044-nor SPI controller. root@localhost ~ # cat /sys/bus/spi/devices/spi0.0/spi-nor/partname gd25lb512me root@localhost ~ # cat /sys/bus/spi/devices/spi0.0/spi-nor/jedec_id c8671a root@localhost ~ # cat /sys/bus/spi/devices/spi0.0/spi-nor/manufacturer gigadevice root@localhost ~ # xxd -p /sys/bus/spi/devices/spi0.0/spi-nor/sfdp 53464450060102ff00060110300000ffc8000103900000ff84000102c000 00ffffffffffffffffffffffffffffffffffe520eaffffffff1f44eb086b 003b00bbfeffffffffff00ffffff44eb0c200f5210d800ffd531b1fe83d6 1458ec6006337a757a7504bdd55c2906740008500001ffffffffffffffff ffffffffffffffffffffffffffffffffffffffffffffffff002050169df9 8156d9c8ffffffffffffffffffffffffffffffffffffffffffffffffffff fffffffffffffffffffffffff38ff0ff215cdcff root@localhost ~ # sha256sum /sys/bus/spi/devices/spi0.0/spi-nor/sfdp 859eb314b0500aa3e3dc5a1ad514f1013387c7aaa40147ed2d616ffc4b6d851c /sys/bus/spi/devices/spi0.0/spi-nor/sfdp root@localhost ~ # #Dump debugfs data root@localhost ~ # cat /sys/kernel/debug/spi-nor/spi0.0/capabilities Supported read modes by the flash 1S-1S-1S opcode 0x13 mode cycles 0 dummy cycles 0 1S-1S-4S opcode 0x6c mode cycles 0 dummy cycles 8 1S-4S-4S opcode 0xec mode cycles 2 dummy cycles 4 4S-4S-4S opcode 0xec mode cycles 2 dummy cycles 4 Supported page program modes by the flash 1S-1S-1S opcode 0x12 1S-1S-4S opcode 0x34 1S-4S-4S opcode 0x3e root@localhost ~ # cat /sys/kernel/debug/spi-nor/spi0.0/params name gd25lb512me id c8 67 1a ff c8 67 size 64.0 MiB write size 1 page size 256 address nbytes 4 flags HAS_SR_TB | 4B_OPCODES | HAS_4BAIT | HAS_LOCK | HAS_16BIT_SR | SOFT_RESET opcodes read 0x13 dummy cycles 0 erase 0x21 program 0x12 8D extension none protocols read 1S-1S-1S write 1S-1S-1S register 1S-1S-1S erase commands 21 (4.00 KiB) [1] 5c (32.0 KiB) [2] dc (64.0 KiB) [3] c7 (64.0 MiB) sector map region (in hex) | erase mask | overlaid ------------------+------------+---------- 00000000-03ffffff | [ 1 ] | no root@localhost ~ # dd if=/dev/urandom of=./spi_test bs=1M count=2 2+0 records in 2+0 records out 2097152 bytes (2.1 MB, 2.0 MiB) copied, 0.0279486 s, 75.0 MB/s root@localhost ~ # mtd_debug erase /dev/mtd0 0 2097152 Erased 2097152 bytes from address 0x00000000 in flash root@localhost ~ # mtd_debug read /dev/mtd0 0 2097152 spi_read Copied 2097152 bytes from address 0x00000000 in flash to spi_read root@localhost ~ # hexdump spi_read 0000000 ffff ffff ffff ffff ffff ffff ffff ffff * 0200000 root@localhost ~ # sha256sum spi_read 4bda3a28f4ffe603c0ec1258c0034d65a1a0d35ab7bd523a834608adabf03cc5 spi_read root@localhost ~ # mtd_debug write /dev/mtd0 0 2097152 spi_test Copied 2097152 bytes from spi_test to address 0x00000000 in flash root@localhost ~ # mtd_debug read /dev/mtd0 0 2097152 spi_read Copied 2097152 bytes from address 0x00000000 in flash to spi_read root@localhost ~ # sha256sum spi* a2ebfaebe38974847a4efb628b29a72f1d50e78c17318869d8954b033dc32e5d spi_read a2ebfaebe38974847a4efb628b29a72f1d50e78c17318869d8954b033dc32e5d spi_test root@localhost ~ # mtd_debug info /dev/mtd0 mtd.type = MTD_NORFLASH mtd.flags = MTD_CAP_NORFLASH mtd.size = 67108864 (64M) mtd.erasesize = 4096 (4K) mtd.writesize = 1 mtd.oobsize = 0 regions = 0 ------------------------------------------------------------------------ Best regards, Zixian
On Sat, May 24 2025, Zixian Zeng wrote: > Hi, Michael, Thank you for your reviews. > > On Fri, May 23, 2025 at 01:16:50PM +0200, Michael Walle wrote: >> Hi, >> >> > Add GD25LB512ME SPI-NOR flash information >> >> Please have a look at [1]. >> >> This flash supports SFDP, do you really need a new entry in the >> flashdb? Could you try without it? >> >> In any case, could you please dump the SFDP see [1], too. >> >> [1] https://docs.kernel.org/driver-api/mtd/spi-nor.html >> >> -michael > > I was following the testing requirements from [1]. > Before that, I have applied the patch: > "mtd: spi-nor: Add GD25LB512ME GigaDevice flash_info" > Because without this patch, the spi-nor device cannot be detected normally. > > ------------------------------- LOG ------------------------------------ > root@localhost ~ # dmesg | grep -i spi > [ 10.199526] spi-nor spi0.0: supply vcc not found, using dummy regulator > [ 11.206477] spi-nor spi0.0: unrecognized JEDEC id bytes: c8 67 1a ff c8 67 > [ 11.213691] spi-nor spi1.0: supply vcc not found, using dummy regulator > [ 12.220614] spi-nor spi1.0: unrecognized JEDEC id bytes: c8 67 1a ff c8 67 The flash seems to have a valid SFDP but for some reason spi_nor_check_sfdp_signature() is not able to validate it to allow the generic driver. Can you please take a look at why? Ideally the generic driver should be enough and you shouldn't need to add an entry unless something is wrong with SFDP data.
diff --git a/drivers/mtd/spi-nor/gigadevice.c b/drivers/mtd/spi-nor/gigadevice.c index ef1edd0add70e6ca501620798a779d621d6bb00d..223b2f598ecd651ce8df6789dfbaf938c534f94f 100644 --- a/drivers/mtd/spi-nor/gigadevice.c +++ b/drivers/mtd/spi-nor/gigadevice.c @@ -33,6 +33,15 @@ static const struct spi_nor_fixups gd25q256_fixups = { .post_bfpt = gd25q256_post_bfpt, }; +static void gd25lb512me_default_init(struct spi_nor *nor) +{ + nor->params->quad_enable = spi_nor_sr1_bit6_quad_enable; +} + +static const struct spi_nor_fixups gd25lb512me_fixups = { + .default_init = gd25lb512me_default_init, +}; + static const struct flash_info gigadevice_nor_parts[] = { { .id = SNOR_ID(0xc8, 0x40, 0x15), @@ -82,6 +91,14 @@ static const struct flash_info gigadevice_nor_parts[] = { .size = SZ_16M, .flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB, .no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ, + }, { + .id = SNOR_ID(0xc8, 0x67, 0x1a), + .name = "gd25lb512me", + .size = SZ_64M, + .flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB, + .no_sfdp_flags = SECT_4K | SPI_NOR_QUAD_READ, + .fixups = &gd25lb512me_fixups, + .fixup_flags = SPI_NOR_4B_OPCODES, }, };
Add GD25LB512ME SPI-NOR flash information Signed-off-by: Zixian Zeng <sycamoremoon376@gmail.com> --- drivers/mtd/spi-nor/gigadevice.c | 17 +++++++++++++++++ 1 file changed, 17 insertions(+)