| Message ID | 20250611-x1p-adreno-v2-0-5074907bebbd@oss.qualcomm.com |
|---|---|
| Headers | show |
| Series | Support for Adreno X1-45 GPU | expand |
On 6/12/25 11:19 PM, Akhil P Oommen wrote: > On 6/12/2025 5:32 PM, Jens Glathe wrote: >> On 6/11/25 13:15, Akhil P Oommen wrote: >> >>> Add support for X1-45 GPU found in X1P41200 chipset (8 cpu core >>> version). X1-45 is a smaller version of X1-85 with lower core count and >>> smaller memories. From UMD perspective, this is similar to "FD735" >>> present in Mesa. >>> >> Hi Akhil, >> >> when loading the driver (still without firmware files) I'm getting a >> speedbin warning: >> >> [ 3.318341] adreno 3d00000.gpu: [drm:a6xx_gpu_init [msm]] *ERROR* >> missing support for speed-bin: 233. Some OPPs may not be supported by >> hardware >> >> I've seen that there is a table for speed bins, this one is not there. >> Tested on a Lenovo ThinkBook 16 G7 QOY. > > Hi Jens, > > Could you please try the below patch? > > diff --git a/drivers/gpu/drm/msm/adreno/a6xx_catalog.c > b/drivers/gpu/drm/msm/adreno/a6xx_catalog.c > index 2db748ce7df5..7748f92919b8 100644 > --- a/drivers/gpu/drm/msm/adreno/a6xx_catalog.c > +++ b/drivers/gpu/drm/msm/adreno/a6xx_catalog.c > @@ -1510,7 +1510,8 @@ static const struct adreno_info a7xx_gpus[] = { > { 0, 0 }, > { 294, 1 }, > { 263, 2 }, > - { 141, 3 }, > + { 233, 3 }, > + { 141, 4 }, > ), > } > }; > > With this, you should see 1107Mhz as the GPU Fmax. I see your dt entry takes care of bins 0..=4.. this oversight worries me a bit - are these values above (post change) all in sync with what you entered into DT? I'm not saying they necessarily aren't, but I want to avoid inconsistencies Konrad
On 12.06.25 23:19, Akhil P Oommen wrote: > Hi Jens, > > Could you please try the below patch? > > diff --git a/drivers/gpu/drm/msm/adreno/a6xx_catalog.c > b/drivers/gpu/drm/msm/adreno/a6xx_catalog.c > index 2db748ce7df5..7748f92919b8 100644 > --- a/drivers/gpu/drm/msm/adreno/a6xx_catalog.c > +++ b/drivers/gpu/drm/msm/adreno/a6xx_catalog.c > @@ -1510,7 +1510,8 @@ static const struct adreno_info a7xx_gpus[] = { > { 0, 0 }, > { 294, 1 }, > { 263, 2 }, > - { 141, 3 }, > + { 233, 3 }, > + { 141, 4 }, > ), > } > }; > > With this, you should see 1107Mhz as the GPU Fmax. > jglathe@tb16-jg:~$ cat /sys/class/devfreq/*gpu*/available_frequencies 280000000 380000000 550000000 666000000 720000000 825000000 940000000 1014000000 1107000000 Looking good. Thanks! Tested-by: Jens Glathe <jens.glathe@oldschoolsolutions.biz> with best regards Jens
On 6/15/2025 12:12 AM, Konrad Dybcio wrote: > On 6/12/25 11:19 PM, Akhil P Oommen wrote: >> On 6/12/2025 5:32 PM, Jens Glathe wrote: >>> On 6/11/25 13:15, Akhil P Oommen wrote: >>> >>>> Add support for X1-45 GPU found in X1P41200 chipset (8 cpu core >>>> version). X1-45 is a smaller version of X1-85 with lower core count and >>>> smaller memories. From UMD perspective, this is similar to "FD735" >>>> present in Mesa. >>>> >>> Hi Akhil, >>> >>> when loading the driver (still without firmware files) I'm getting a >>> speedbin warning: >>> >>> [ 3.318341] adreno 3d00000.gpu: [drm:a6xx_gpu_init [msm]] *ERROR* >>> missing support for speed-bin: 233. Some OPPs may not be supported by >>> hardware >>> >>> I've seen that there is a table for speed bins, this one is not there. >>> Tested on a Lenovo ThinkBook 16 G7 QOY. >> >> Hi Jens, >> >> Could you please try the below patch? >> >> diff --git a/drivers/gpu/drm/msm/adreno/a6xx_catalog.c >> b/drivers/gpu/drm/msm/adreno/a6xx_catalog.c >> index 2db748ce7df5..7748f92919b8 100644 >> --- a/drivers/gpu/drm/msm/adreno/a6xx_catalog.c >> +++ b/drivers/gpu/drm/msm/adreno/a6xx_catalog.c >> @@ -1510,7 +1510,8 @@ static const struct adreno_info a7xx_gpus[] = { >> { 0, 0 }, >> { 294, 1 }, >> { 263, 2 }, >> - { 141, 3 }, >> + { 233, 3 }, >> + { 141, 4 }, >> ), >> } >> }; >> >> With this, you should see 1107Mhz as the GPU Fmax. > > I see your dt entry takes care of bins 0..=4.. this oversight worries > me a bit - are these values above (post change) all in sync with what > you entered into DT? Yes. DT is accurate. And with this additional change both the driver and DT will be consistent. -Akhil. > > I'm not saying they necessarily aren't, but I want to avoid > inconsistencies > > Konrad >
Add support for X1-45 GPU found in X1P41200 chipset (8 cpu core version). X1-45 is a smaller version of X1-85 with lower core count and smaller memories. From UMD perspective, this is similar to "FD735" present in Mesa. Tested Glmark & Vkmark on Debian Gnome desktop. Signed-off-by: Akhil P Oommen <akhilpo@oss.qualcomm.com> --- Changes in v2: - Skip 'delete-property' wherever it is unnecessary (Dmitry) - Reorder dt nodes alphabetically (Konrad) - A new patch#1 to fix the dtbs_check error - Link to v1: https://lore.kernel.org/r/20250607-x1p-adreno-v1-0-a8ea80f3b18b@oss.qualcomm.com --- Akhil P Oommen (4): dt-bindings: opp: adreno: Update regex of OPP entry arm64: defconfig: Enable X1P42100_GPUCC driver drm/msm/adreno: Add Adreno X1-45 support arm64: dts: qcom: Add GPU support to X1P42100 SoC .../bindings/opp/opp-v2-qcom-adreno.yaml | 2 +- arch/arm64/boot/dts/qcom/x1e80100.dtsi | 7 ++ arch/arm64/boot/dts/qcom/x1p42100-crd.dts | 4 + arch/arm64/boot/dts/qcom/x1p42100.dtsi | 120 ++++++++++++++++++++- arch/arm64/configs/defconfig | 1 + drivers/gpu/drm/msm/adreno/a6xx_catalog.c | 38 +++++++ 6 files changed, 169 insertions(+), 3 deletions(-) --- base-commit: b3bded85d838336326ce78e394e7818445e11f20 change-id: 20250603-x1p-adreno-219da2fd4ca4 Best regards,