| Message ID | c1ff2155-ef01-466e-9c34-4437ee57656c@gmail.com |
|---|---|
| State | New |
| Headers | show |
| Series | wifi: rtw89: Add support for USB devices | expand |
Hi Bitterblue,
kernel test robot noticed the following build errors:
[auto build test ERROR on wireless-next/main]
[also build test ERROR on wireless/main linus/master v6.16-rc1 next-20250610]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url: https://github.com/intel-lab-lkp/linux/commits/Bitterblue-Smith/wifi-rtw89-8851b-Accept-USB-devices-and-load-their-MAC-address/20250610-033543
base: https://git.kernel.org/pub/scm/linux/kernel/git/wireless/wireless-next.git main
patch link: https://lore.kernel.org/r/c1ff2155-ef01-466e-9c34-4437ee57656c%40gmail.com
patch subject: [PATCH rtw-next v2 09/14] wifi: rtw89: 8851b: Modify rtw8851b_pwr_{on,off}_func() for USB
config: loongarch-loongson3_defconfig (https://download.01.org/0day-ci/archive/20250610/202506102119.fyp9p96Z-lkp@intel.com/config)
compiler: loongarch64-linux-gcc (GCC) 15.1.0
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20250610/202506102119.fyp9p96Z-lkp@intel.com/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202506102119.fyp9p96Z-lkp@intel.com/
All errors (new ones prefixed by >>):
drivers/net/wireless/realtek/rtw89/rtw8851b.c: In function 'rtw8851b_pwr_off_func':
>> drivers/net/wireless/realtek/rtw89/rtw8851b.c:523:61: error: 'B_AX_SOP_EDSWR' undeclared (first use in this function); did you mean 'B_BE_SOP_EDSWR'?
523 | rtw89_write32_clr(rtwdev, R_AX_SYS_PW_CTRL, B_AX_SOP_EDSWR);
| ^~~~~~~~~~~~~~
| B_BE_SOP_EDSWR
drivers/net/wireless/realtek/rtw89/rtw8851b.c:523:61: note: each undeclared identifier is reported only once for each function it appears in
vim +523 drivers/net/wireless/realtek/rtw89/rtw8851b.c
477
478 static int rtw8851b_pwr_off_func(struct rtw89_dev *rtwdev)
479 {
480 u32 val32;
481 int ret;
482
483 ret = rtw89_mac_write_xtal_si(rtwdev, XTAL_SI_ANAPAR_WL, XTAL_SI_RFC2RF,
484 XTAL_SI_RFC2RF);
485 if (ret)
486 return ret;
487 ret = rtw89_mac_write_xtal_si(rtwdev, XTAL_SI_ANAPAR_WL, 0, XTAL_SI_OFF_EI);
488 if (ret)
489 return ret;
490 ret = rtw89_mac_write_xtal_si(rtwdev, XTAL_SI_ANAPAR_WL, 0, XTAL_SI_OFF_WEI);
491 if (ret)
492 return ret;
493 ret = rtw89_mac_write_xtal_si(rtwdev, XTAL_SI_WL_RFC_S0, 0, XTAL_SI_RF00);
494 if (ret)
495 return ret;
496 ret = rtw89_mac_write_xtal_si(rtwdev, XTAL_SI_ANAPAR_WL, XTAL_SI_SRAM2RFC,
497 XTAL_SI_SRAM2RFC);
498 if (ret)
499 return ret;
500 ret = rtw89_mac_write_xtal_si(rtwdev, XTAL_SI_ANAPAR_WL, 0, XTAL_SI_PON_EI);
501 if (ret)
502 return ret;
503 ret = rtw89_mac_write_xtal_si(rtwdev, XTAL_SI_ANAPAR_WL, 0, XTAL_SI_PON_WEI);
504 if (ret)
505 return ret;
506
507 rtw89_write32_set(rtwdev, R_AX_WLAN_XTAL_SI_CONFIG,
508 B_AX_XTAL_SI_ADDR_NOT_CHK);
509 rtw89_write32_set(rtwdev, R_AX_SYS_PW_CTRL, B_AX_EN_WLON);
510 rtw89_write32_clr(rtwdev, R_AX_WLRF_CTRL, B_AX_AFC_AFEDIG);
511 rtw89_write8_clr(rtwdev, R_AX_SYS_FUNC_EN, B_AX_FEN_BB_GLB_RSTN | B_AX_FEN_BBRSTB);
512
513 rtw89_write32_set(rtwdev, R_AX_SYS_PW_CTRL, B_AX_APFM_OFFMAC);
514
515 ret = read_poll_timeout(rtw89_read32, val32, !(val32 & B_AX_APFM_OFFMAC),
516 1000, 20000, false, rtwdev, R_AX_SYS_PW_CTRL);
517 if (ret)
518 return ret;
519
520 if (rtwdev->hci.type == RTW89_HCI_TYPE_PCIE)
521 rtw89_write32(rtwdev, R_AX_WLLPS_CTRL, SW_LPS_OPTION);
522 else if (rtwdev->hci.type == RTW89_HCI_TYPE_USB)
> 523 rtw89_write32_clr(rtwdev, R_AX_SYS_PW_CTRL, B_AX_SOP_EDSWR);
524
525 if (rtwdev->hal.cv == CHIP_CAV) {
526 rtw8851b_patch_swr_pfm2pwm(rtwdev);
527 } else {
528 rtw89_write32_set(rtwdev, R_AX_SPSLDO_ON_CTRL1, B_AX_FPWMDELAY);
529 rtw89_write32_set(rtwdev, R_AX_SPSANA_ON_CTRL1, B_AX_FPWMDELAY);
530 }
531
532 if (rtwdev->hci.type == RTW89_HCI_TYPE_PCIE) {
533 rtw89_write32_set(rtwdev, R_AX_SYS_PW_CTRL, B_AX_APFM_SWLPS);
534 } else if (rtwdev->hci.type == RTW89_HCI_TYPE_USB) {
535 val32 = rtw89_read32(rtwdev, R_AX_SYS_PW_CTRL);
536 val32 &= ~B_AX_AFSM_PCIE_SUS_EN;
537 val32 |= B_AX_AFSM_WLSUS_EN;
538 rtw89_write32(rtwdev, R_AX_SYS_PW_CTRL, val32);
539 }
540
541 return 0;
542 }
543
Bitterblue Smith <rtl8821cerfe2@gmail.com> wrote: > There are a few differences in the power on/off functions between PCIE > and USB. > > While the RTL8851BU appears to work without these changes, it's > probably best to implement them, in case they are needed in some > situations. The difference between RTL8851BE and RTL8851BU is very small, so it is reasonable to combine them with conditions of hci.type. If other chips have much difference, please define array such as pwr_on_func[RTW89_HCI_TYPE_NUM] It would much easier to update the changes from vendor driver. > > Signed-off-by: Bitterblue Smith <rtl8821cerfe2@gmail.com> Acked-by: Ping-Ke Shih <pkshih@realtek.com>
diff --git a/drivers/net/wireless/realtek/rtw89/rtw8851b.c b/drivers/net/wireless/realtek/rtw89/rtw8851b.c index 048e64fa1d51..febe9b7afe59 100644 --- a/drivers/net/wireless/realtek/rtw89/rtw8851b.c +++ b/drivers/net/wireless/realtek/rtw89/rtw8851b.c @@ -385,7 +385,8 @@ static int rtw8851b_pwr_on_func(struct rtw89_dev *rtwdev) rtw89_write8_clr(rtwdev, R_AX_PLATFORM_ENABLE, B_AX_PLATFORM_EN); rtw89_write8_set(rtwdev, R_AX_PLATFORM_ENABLE, B_AX_PLATFORM_EN); - rtw89_write32_clr(rtwdev, R_AX_SYS_SDIO_CTRL, B_AX_PCIE_CALIB_EN_V1); + if (rtwdev->hci.type == RTW89_HCI_TYPE_PCIE) + rtw89_write32_clr(rtwdev, R_AX_SYS_SDIO_CTRL, B_AX_PCIE_CALIB_EN_V1); ret = rtw89_mac_write_xtal_si(rtwdev, XTAL_SI_ANAPAR_WL, XTAL_SI_OFF_WEI, XTAL_SI_OFF_WEI); @@ -430,8 +431,9 @@ static int rtw8851b_pwr_on_func(struct rtw89_dev *rtwdev) rtw89_write32_clr(rtwdev, R_AX_SYS_ISO_CTRL, B_AX_PWC_EV2EF_B14); rtw89_write32_clr(rtwdev, R_AX_PMC_DBG_CTRL2, B_AX_SYSON_DIS_PMCR_AX_WRMSK); - rtw89_write32_set(rtwdev, R_AX_GPIO0_16_EECS_EESK_LED1_PULL_LOW_EN, - B_AX_GPIO10_PULL_LOW_EN | B_AX_GPIO16_PULL_LOW_EN_V1); + if (rtwdev->hci.type == RTW89_HCI_TYPE_PCIE) + rtw89_write32_set(rtwdev, R_AX_GPIO0_16_EECS_EESK_LED1_PULL_LOW_EN, + B_AX_GPIO10_PULL_LOW_EN | B_AX_GPIO16_PULL_LOW_EN_V1); if (rtwdev->hal.cv == CHIP_CAV) { ret = rtw89_read_efuse_ver(rtwdev, &val8); @@ -515,7 +517,10 @@ static int rtw8851b_pwr_off_func(struct rtw89_dev *rtwdev) if (ret) return ret; - rtw89_write32(rtwdev, R_AX_WLLPS_CTRL, SW_LPS_OPTION); + if (rtwdev->hci.type == RTW89_HCI_TYPE_PCIE) + rtw89_write32(rtwdev, R_AX_WLLPS_CTRL, SW_LPS_OPTION); + else if (rtwdev->hci.type == RTW89_HCI_TYPE_USB) + rtw89_write32_clr(rtwdev, R_AX_SYS_PW_CTRL, B_AX_SOP_EDSWR); if (rtwdev->hal.cv == CHIP_CAV) { rtw8851b_patch_swr_pfm2pwm(rtwdev); @@ -524,7 +529,14 @@ static int rtw8851b_pwr_off_func(struct rtw89_dev *rtwdev) rtw89_write32_set(rtwdev, R_AX_SPSANA_ON_CTRL1, B_AX_FPWMDELAY); } - rtw89_write32_set(rtwdev, R_AX_SYS_PW_CTRL, B_AX_APFM_SWLPS); + if (rtwdev->hci.type == RTW89_HCI_TYPE_PCIE) { + rtw89_write32_set(rtwdev, R_AX_SYS_PW_CTRL, B_AX_APFM_SWLPS); + } else if (rtwdev->hci.type == RTW89_HCI_TYPE_USB) { + val32 = rtw89_read32(rtwdev, R_AX_SYS_PW_CTRL); + val32 &= ~B_AX_AFSM_PCIE_SUS_EN; + val32 |= B_AX_AFSM_WLSUS_EN; + rtw89_write32(rtwdev, R_AX_SYS_PW_CTRL, val32); + } return 0; }
There are a few differences in the power on/off functions between PCIE and USB. While the RTL8851BU appears to work without these changes, it's probably best to implement them, in case they are needed in some situations. Signed-off-by: Bitterblue Smith <rtl8821cerfe2@gmail.com> --- v2: - Patch is new in v2. --- drivers/net/wireless/realtek/rtw89/rtw8851b.c | 22 ++++++++++++++----- 1 file changed, 17 insertions(+), 5 deletions(-)