From patchwork Thu Feb 15 17:20:49 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ard Biesheuvel X-Patchwork-Id: 128484 Delivered-To: patch@linaro.org Received: by 10.46.124.24 with SMTP id x24csp1984631ljc; Thu, 15 Feb 2018 09:21:12 -0800 (PST) X-Google-Smtp-Source: AH8x225Z8jEEX503xbIDS7NvXZoOi2FAJ+0GUStA9YtCO1+lANB872IKlMkuvosWdKrtaSss0CMx X-Received: by 10.98.44.77 with SMTP id s74mr3309661pfs.3.1518715272053; Thu, 15 Feb 2018 09:21:12 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1518715272; cv=none; d=google.com; s=arc-20160816; b=mIsnNKRrhiI5Xqa/+hBCYy9pA1G7D/K7tcHNm0H2b8daYpqlhxlYL8TVwqUKwP+HT/ bCq7DZHo14QfiSMlkwjIi5lE90WN+aaOWxn9N++6OKCjYM4sYtzxqh9+ZN65BhnoSF2T MQ8V70JlJomSYQgTEPHOhBk7gh6JINeBf0PomyER0g+Bs3bHXWUE7adQ8jNbhzkCyDoj Oag8ZMiCiyoXPnsIucJDUF79kvWBAn8HgFIteMuu/97Ajz5791O8vHMl6fOBiv8kdhy1 q0b/OfhE6pG2B7yfq6BRuxEPjfu9cPbw8xm74zK4T+2VJqvFzkkyrYz5pA/ltRclMM2o 7bCw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version:cc :list-subscribe:list-help:list-post:list-archive:list-unsubscribe :list-id:precedence:subject:message-id:date:to:from:dkim-signature :delivered-to:arc-authentication-results; bh=iV7Al0DQVxXbJ+P7nyCZJu6d1oy36mri6mm45PE5cN8=; b=NAQItRDb/XMSB9JHNyBmwXHu7u9G3SzH8+BDbXZVGq5KXY2Ha3E2Zs2HqITbaBTsjD DPmQQ3Zj+d/NGHFbhwAL1yJrrrtAQyJm/kA7jsjO0ngetIEhlsJN2aXbW3Qc90NIOa8h 4OFVgD3rgDHeCU1jsCZ2MkI5yRZEmZam2fEjjKnPtlI/2HKGYzP3St+anM3GQCpH5Sot UBh0+z5xi3CmFuv5kebNuRcGTajSJMyRqAQtaIER/cKPLNJG/MqqkDg1mHbJVBkZSdai ZVdV2QQ8U09Vps+yAlcf/wZSGFaAce4xt/lVkg0YnS17YHHPGj+yBwZcDtoeN/CAI7rn iaxw== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=SaYJ7Nb5; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 2001:19d0:306:5::1 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from ml01.01.org (ml01.01.org. [2001:19d0:306:5::1]) by mx.google.com with ESMTPS id b11si4472339pgr.434.2018.02.15.09.21.11 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 15 Feb 2018 09:21:12 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 2001:19d0:306:5::1 as permitted sender) client-ip=2001:19d0:306:5::1; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=SaYJ7Nb5; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 2001:19d0:306:5::1 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id EA4EB220F33F3; Thu, 15 Feb 2018 09:15:17 -0800 (PST) X-Original-To: edk2-devel@lists.01.org Delivered-To: edk2-devel@lists.01.org Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2a00:1450:400c:c0c::241; helo=mail-wr0-x241.google.com; envelope-from=ard.biesheuvel@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-wr0-x241.google.com (mail-wr0-x241.google.com [IPv6:2a00:1450:400c:c0c::241]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id D664D220F33C5 for ; Thu, 15 Feb 2018 09:15:15 -0800 (PST) Received: by mail-wr0-x241.google.com with SMTP id l43so434159wrc.2 for ; Thu, 15 Feb 2018 09:21:08 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id; bh=zTkmvLwFGBmv+JGNiiec6YpR5QWJoADhhbKAhX+qGD8=; b=SaYJ7Nb5dzYBbWTc21wthCa+n0MQGYQdX1uI6WlKvLI/MmP8FuosEKQd3VTbGgth7b 9B3EHcIfsjD+NjV9tHNlSmnY3+hw04Nm1VG9RUoyMC83RFnemc+BNlcVrLWxvrTUwgYj mRqgphmSnzkEiaK9D4k7wSfhyO9CAC1s9P/7g= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=zTkmvLwFGBmv+JGNiiec6YpR5QWJoADhhbKAhX+qGD8=; b=lnirfsnW/YUD8fALq34NvXnIm7CuIr1HZL+OY8qDetB0TVoYz5aCzpjPbiUL6gJrhG degDlPKcO/9ukUzCTcTThsGmoTuj5GX4Jy8cHcedrXRYHzHV9X6zPJi/2slGc/BcJQP+ 3PPICu3V8Is+MueL0Kdn1ieElQWdHRMoaEkvJyA1n9AmxHcqoEjTrE8jsU7NfGYkAuN0 0z7ExrWii8lDbshZ2xRSYsolrTQHYm8y0j/fLCEFDDLTBBxFz1Yn+rGs+Uybnpw7uBf6 vbKUUDIO7YPChb/g58p8cMWFk7BJ9Zl+F2n2zQhyc16E9IEVHbLGWiworgQ9iU63AUqq 4j7g== X-Gm-Message-State: APf1xPDja8v66KA2J7teaHh63Yhs7Esh9qDL+AEkkGhjYGRtgmpcwAmC 54tbj3TrryEIkcd3LmEeOo6nLM8inW8= X-Received: by 10.223.144.198 with SMTP id i64mr3411305wri.6.1518715266181; Thu, 15 Feb 2018 09:21:06 -0800 (PST) Received: from localhost.localdomain ([154.145.114.50]) by smtp.gmail.com with ESMTPSA id j125sm14142363wmd.19.2018.02.15.09.21.02 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 15 Feb 2018 09:21:04 -0800 (PST) From: Ard Biesheuvel To: edk2-devel@lists.01.org Date: Thu, 15 Feb 2018 17:20:49 +0000 Message-Id: <20180215172054.27452-1-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.11.0 Subject: [edk2] [PATCH edk2-platforms 0/5] Add Secure96 mezzanine support X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: joakim.bech@linaro.org, leif.lindholm@linaro.org, Ard Biesheuvel MIME-Version: 1.0 Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" This series adds preliminary support for the Secure96 mezzanine board, an expansion board that can be plugged into the low speed connector on the Socionext SynQuacer based Developer Box platform. I have attempted to implement this in a reusable way, i.e., the secure96 specific parts are in separate drivers which could theoretically be imported by other platforms as well. I am presenting this to discuss the approach. My end goal is to wire up the Atmel SHA204A on this board in UEFI so it can be used as a random number generator, but this should be mostly orthogonal (and if it isn't, we can add it on top). Ard Biesheuvel (5): Silicon/SynQuaver/DeviceTree: add node for SPI controller Silicon/SynQuaver/DeviceTree: add node for I2C controller Platform: add support for 96boards Secure96 mezzanine adapter Silicon/SynQuacer/PlatformDxe: add menu option to select mezzanine Platform/Socionext/DeveloperBox: add Secure96 support Platform/96boards/Secure96/DeviceTree/DeviceTree.inf | 40 +++++ Platform/96boards/Secure96/DeviceTree/Secure96.dts | 74 ++++++++++ Platform/96boards/Secure96/Secure96.dec | 56 +++++++ Platform/96boards/Secure96/Secure96Dxe/Secure96Dxe.c | 153 ++++++++++++++++++++ Platform/96boards/Secure96/Secure96Dxe/Secure96Dxe.inf | 51 +++++++ Platform/Socionext/DeveloperBox/DeveloperBox.dsc | 21 +++ Platform/Socionext/DeveloperBox/DeveloperBox.fdf | 6 + Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi | 36 +++++ Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.c | 8 + Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxe.inf | 2 + Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxeHii.uni | 6 + Silicon/Socionext/SynQuacer/Drivers/PlatformDxe/PlatformDxeHii.vfr | 8 + Silicon/Socionext/SynQuacer/Include/Platform/VarStore.h | 6 +- 13 files changed, 466 insertions(+), 1 deletion(-) create mode 100644 Platform/96boards/Secure96/DeviceTree/DeviceTree.inf create mode 100644 Platform/96boards/Secure96/DeviceTree/Secure96.dts create mode 100644 Platform/96boards/Secure96/Secure96.dec create mode 100644 Platform/96boards/Secure96/Secure96Dxe/Secure96Dxe.c create mode 100644 Platform/96boards/Secure96/Secure96Dxe/Secure96Dxe.inf -- 2.11.0 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel