| Message ID | 20180823160743.45638-1-ming.huang@linaro.org |
|---|---|
| Headers | show |
| Series | Upload for D06 platform | expand |
Allright, we're getting close. Please generate a v5 based on my comments for v4. If that does not require changes to edk2-non-osi, there is no need to generate a v5 of that. _But_, one big overarching issue: Every commit in the series needs to be buildable. For D03, D05 and D06. There are many ordering issues in this version. Please ensure Basically, before you submit v5, I want you to: 1) create a copy of the branch you intend to submit, rebased onto origin/master 2) build it for all of those platforms, in DEBUG and RELEASE mode 3) If that causes any build failures, fix those 3.1) if those changes require any reordering of patches, goto 1 4) git reset --hard HEAD~1 5) if current commit is not origin/master, goto 2 I have a very hackish script called "check-bisect.sh" which I have just added to uefi-tools. This takes care of steps 2-5 automatically, stopping and reporting on any build failures. 1 needs to be repeated manually. Best Regards, Leif On Fri, Aug 24, 2018 at 12:07:12AM +0800, Ming Huang wrote: > The major features of this patchset include: > 1 D06 source code; > 2 Unify some D0x modules; > > Change since v2: (1~3 have reviewed in v3) > 1 Modify "Wait for all disk ready" patch as communication, update SAS driver binary also; > 2 Modify OemNicLib, set Mac to 0xFF while eeprom don't contain valid Mac; > 3 Remove .h file from Apei.inf; > 4 Replace "Support SPCR table switch" with EmbeddedPkg/Drivers/ConsolePrefDxe/ConsolePrefDxe; > And remove EnableSpcr field from patch "Add Hi1620OemConfigUiLib"; > And move some lines from patch "Support SPCR table switch" to patch "Enable/disable SMMU"; > 5 Move I2CLib set before D06 patch; > 6 Drop patch "Add some Lpc macro to LpcLib.h"; > 7 Drop Oem Shell commands patch; > 8 Move PLATFORM_SAS_NOTIFY API to edk2-non-osi; > 9 Modify Signed-off-by and add Reviewed-by; > 10 Change include "PlatformArch.h" to <PlatformArch.h>; > 11 Modify other comments in v2/v3; > > Code can also be found in github: https://github.com/hisilicon/OpenPlatformPkg.git > branch: d06-platform-v4 > > > Heyi Guo (3): > Hisilicon/D06: Add Debug Serial Port Init Driver > Hisilicon/Hi1620: Add ACPI PPTT table > Platform/Hisilicon/D06: Enable ACPI PPTT > > Luqi Jiang (1): > Hisilicon/D06: add apei driver > > Ming Huang (21): > Silicon/Hisilicon/Acpi: Move some macro to PlatformArch.h > Silicon/Hisilicon: Fix I2CLib enable fail issue > Silicon/Hisilicon: Add I2CLib delay for HNS auto config > Hisilicon/D06: Add several base file for D06 > Platform/Hisilicon/D06: Add M41T83RealTimeClockLib > Platform/Hisilicon/D06: Add edk2-non-osi components for D06 > Hisilicon/D06: Add OemMiscLibD06 > Silicon/Hisilicon/D06: Wait for all disk ready > Silicon/Hisilicon/Acpi: Unify HisiAcpiPlatformDxe > Hisilicon/D06: Add ACPI Tables for D06 > Silicon/Hisilicon/D06: Stop watchdog > Platform/Hisilicon/D06: Add OemNicLib > Platform/Hisilicon/D06: Add OemNicConfig2P Driver > Platform/Hisilicon/D06: Add EarlyConfigPeim peim > Platform/Hisilicon/D06: Add PciHostBridgeLib > Platform/Hisilicon/D06: Add capsule upgrade support > Silicon/Hisilicon: Add I2C Bus Exception handle function > Silicon/Hisilicon/Setup: Support SPCR table switch > Silicon/Hisilicon/setup: Enable/disable SMMU > Hisilicon/D06: Add PciPlatformLib > Platform/Hisilicon/D0x: Update version string to 18.08 > > Sun Yuanchen (2): > Silicon/Hisilicon/D0x: Move RAS macro to PlatformArch.h > Hisilicon/D0x: Update SMBIOS type9 info > > Yang XinYi (2): > Hisilicon/D06: Add Hi1620OemConfigUiLib > Silicon/Hisilicon/Setup: Add Setup Item "EnableGOP" > > ZhenYao (1): > Silicon/Hisilicon: Modify for close slave core clock. > > shaochangliang (1): > Silicon/Hisilicon: Optimize I2CLib for HNS config CDR time > > Platform/Hisilicon/D06/D06.dec | 29 + > Silicon/Hisilicon/Hi1610/Hi1610.dec | 23 + > Silicon/Hisilicon/Hi1616/Hi1616.dec | 23 + > Silicon/Hisilicon/Hi1620/Hi1620.dec | 23 + > Silicon/Hisilicon/HisiPkg.dec | 1 + > Platform/Hisilicon/D03/D03.dsc | 2 +- > Platform/Hisilicon/D05/D05.dsc | 2 +- > Platform/Hisilicon/D06/D06.dsc | 489 ++++ > Platform/Hisilicon/D06/D06.fdf | 445 ++++ > .../OemMiscLib2P/OemMiscLib2PHi1610.inf | 1 + > .../Library/OemMiscLibD05/OemMiscLibD05.inf | 1 + > .../OemNicConfig2PHi1620/OemNicConfig2P.inf | 43 + > .../SystemFirmwareDescriptor.inf | 50 + > .../EarlyConfigPeim/EarlyConfigPeimD06.inf | 50 + > .../Library/OemMiscLibD06/OemMiscLibD06.inf | 51 + > .../D06/Library/OemNicLib/OemNicLib.inf | 35 + > .../PciHostBridgeLib/PciHostBridgeLib.inf | 36 + > .../HisiAcpiPlatformDxe/AcpiPlatformDxe.inf | 3 +- > .../Hi1610AcpiTables/AcpiTablesHi1610.inf | 2 +- > .../Hi1616/D05AcpiTables/AcpiTablesHi1616.inf | 2 +- > .../Hisilicon/Hi1620/Drivers/Apei/Apei.inf | 59 + > .../Pl011DebugSerialPortInitDxe.inf | 48 + > .../Hi1620AcpiTables/AcpiTablesHi1620.inf | 60 + > .../Hi1620OemConfigUiLib/OemConfigUiLib.inf | 68 + > .../Hi1620PciPlatformLib.inf | 30 + > Silicon/Hisilicon/Hi1620/Pptt/Pptt.inf | 48 + > .../M41T83RealTimeClockLib.inf | 46 + > .../PlatformBootManagerLib.inf | 5 + > .../OemNicConfig2PHi1620/OemNicConfig.h | 25 + > .../Hisilicon/D06/Include/Library/CpldD06.h | 39 + > .../Hi1610/Hi1610AcpiTables/Hi1610Platform.h | 27 +- > .../Hisilicon/Hi1610/Include/PlatformArch.h | 39 +- > .../Hi1616/D05AcpiTables/Hi1616Platform.h | 24 +- > .../Hisilicon/Hi1616/Include/PlatformArch.h | 35 + > Silicon/Hisilicon/Hi1620/Drivers/Apei/Apei.h | 41 + > .../Hisilicon/Hi1620/Drivers/Apei/Bert/Bert.h | 43 + > .../Hisilicon/Hi1620/Drivers/Apei/Einj/Einj.h | 146 ++ > .../Hi1620/Drivers/Apei/ErrorSource/Ghes.h | 110 + > .../Hisilicon/Hi1620/Drivers/Apei/Erst/Erst.h | 140 ++ > .../Hisilicon/Hi1620/Drivers/Apei/Hest/Hest.h | 59 + > .../Hi1620/Drivers/Apei/OemApeiHi1620.h | 43 + > .../Hi1620/Hi1620AcpiTables/Hi1620Platform.h | 27 + > .../Hi1620/Hi1620OemConfigUiLib/OemConfig.h | 142 ++ > .../Hi1620/Hi1620OemConfigUiLib/OemConfigUi.h | 64 + > .../Hi1620/Include/Library/SerdesLib.h | 85 + > .../Hisilicon/Hi1620/Include/PlatformArch.h | 67 + > Silicon/Hisilicon/Hi1620/Pptt/Pptt.h | 68 + > .../Hisilicon/Include/Library/AcpiNextLib.h | 31 +- > .../Hisilicon/Include/Library/IpmiCmdLib.h | 16 + > .../Include/Library/OemAddressMapLib.h | 8 + > .../Hisilicon/Include/Library/OemConfigData.h | 84 + > .../Hisilicon/Include/Library/OemMiscLib.h | 7 +- > Silicon/Hisilicon/Include/Library/OemNicLib.h | 57 + > .../Include/Library/PlatformSysCtrlLib.h | 6 + > Silicon/Hisilicon/Library/I2CLib/I2CHw.h | 3 + > .../M41T83RealTimeClock.h | 158 ++ > .../Hi1620OemConfigUiLib/OemConfigVfr.vfr | 89 + > .../Library/OemMiscLib2P/OemMiscLib2PHi1610.c | 32 + > .../D05/Library/OemMiscLibD05/OemMiscLibD05.c | 27 +- > .../OemNicConfig2PHi1620/OemNicConfig2P.c | 71 + > .../SystemFirmwareDescriptorPei.c | 70 + > .../D06/EarlyConfigPeim/EarlyConfigPeimD06.c | 107 + > .../Library/OemMiscLibD06/BoardFeatureD06.c | 432 ++++ > .../D06/Library/OemMiscLibD06/OemMiscLibD06.c | 209 ++ > .../D06/Library/OemNicLib/OemNicLib.c | 570 +++++ > .../PciHostBridgeLib/PciHostBridgeLib.c | 635 ++++++ > .../HisiAcpiPlatformDxe/UpdateAcpiTable.c | 91 +- > .../Smbios/AddSmbiosType9/AddSmbiosType9.c | 14 +- > Silicon/Hisilicon/Hi1620/Drivers/Apei/Apei.c | 108 + > .../Hisilicon/Hi1620/Drivers/Apei/Bert/Bert.c | 91 + > .../Hisilicon/Hi1620/Drivers/Apei/Einj/Einj.c | 349 +++ > .../Hi1620/Drivers/Apei/ErrorSource/Ghes.c | 330 +++ > .../Hisilicon/Hi1620/Drivers/Apei/Erst/Erst.c | 374 ++++ > .../Hisilicon/Hi1620/Drivers/Apei/Hest/Hest.c | 118 + > .../Hi1620/Drivers/Apei/OemApeiHi1620.c | 337 +++ > .../Pl011DebugSerialPortInitDxe.c | 64 + > .../Hi1620/Hi1620OemConfigUiLib/OemConfig.c | 363 +++ > .../Hi1620PciPlatformLib.c | 67 + > Silicon/Hisilicon/Hi1620/Pptt/Pptt.c | 543 +++++ > Silicon/Hisilicon/Library/I2CLib/I2CLib.c | 48 +- > .../M41T83RealTimeClockLib.c | 559 +++++ > .../PlatformBootManagerLib/PlatformBm.c | 59 + > .../SystemFirmwareUpdateConfig.ini | 46 + > .../SystemFirmwareDescriptor.aslc | 81 + > .../OemMiscLibD06/BoardFeatureD06Strings.uni | 66 + > .../Hi1620/Hi1620AcpiTables/Dsdt/CPU.asl | 409 ++++ > .../Hi1620/Hi1620AcpiTables/Dsdt/Com.asl | 30 + > .../Hi1620AcpiTables/Dsdt/DsdtHi1620.asl | 35 + > .../Hi1620AcpiTables/Dsdt/Hi1620Apei.asl | 93 + > .../Hi1620AcpiTables/Dsdt/Hi1620Ged.asl | 58 + > .../Hi1620AcpiTables/Dsdt/Hi1620Mbig.asl | 1459 ++++++++++++ > .../Hi1620AcpiTables/Dsdt/Hi1620Mctp.asl | 41 + > .../Hi1620AcpiTables/Dsdt/Hi1620Pci.asl | 1216 ++++++++++ > .../Hi1620AcpiTables/Dsdt/Hi1620Power.asl | 28 + > .../Hi1620AcpiTables/Dsdt/Hi1620Rde.asl | 47 + > .../Hi1620AcpiTables/Dsdt/Hi1620Sec.asl | 57 + > .../Dsdt/Hi1620Socip4_i2c100k.asl | 249 +++ > .../Dsdt/Hi1620Socip4_i2c400k.asl | 249 +++ > .../Hi1620AcpiTables/Dsdt/LpcUart_clk.asl | 49 + > .../Hi1620AcpiTables/Dsdt/Pv680UncorePmu.asl | 1658 ++++++++++++++ > .../Hi1620/Hi1620AcpiTables/Dsdt/ipmi.asl | 49 + > .../Hi1620/Hi1620AcpiTables/Facs.aslc | 67 + > .../Hi1620/Hi1620AcpiTables/Fadt.aslc | 91 + > .../Hi1620/Hi1620AcpiTables/Gtdt.aslc | 86 + > .../Hi1620/Hi1620AcpiTables/Hi1620Dbg2.aslc | 86 + > .../Hi1620/Hi1620AcpiTables/Hi1620Iort.asl | 1989 +++++++++++++++++ > .../Hi1620AcpiTables/Hi1620IortNoSmmu.asl | 1736 ++++++++++++++ > .../Hi1620/Hi1620AcpiTables/Hi1620Mcfg.aslc | 64 + > .../Hi1620/Hi1620AcpiTables/Hi1620Slit.aslc | 64 + > .../Hi1620/Hi1620AcpiTables/Hi1620Spcr.aslc | 81 + > .../Hi1620/Hi1620AcpiTables/Hi1620Srat.aslc | 166 ++ > .../Hi1620/Hi1620AcpiTables/MadtHi1620.aslc | 375 ++++ > .../Hi1620OemConfigUiLib/MemoryConfig.hfr | 154 ++ > .../Hi1620OemConfigUiLib/MemoryConfig.uni | 103 + > .../Hi1620OemConfigUiLib/MiscConfig.hfr | 41 + > .../Hi1620OemConfigUiLib/MiscConfig.uni | 27 + > .../Hi1620OemConfigUiLib/OemConfigUiLib.uni | 24 + > .../OemConfigUiLibStrings.uni | 42 + > .../Hi1620OemConfigUiLib/PcieConfig.hfr | 219 ++ > .../PcieConfigStrings.uni | 111 + > .../Hi1620OemConfigUiLib/PciePortConfig.hfr | 167 ++ > .../Hi1620/Hi1620OemConfigUiLib/RasConfig.hfr | 172 ++ > .../Hi1620/Hi1620OemConfigUiLib/RasConfig.uni | 85 + > .../Hi1620OemConfigUiLib/iBMCConfig.hfr | 81 + > .../Hi1620OemConfigUiLib/iBMCConfig.uni | 34 + > 125 files changed, 20920 insertions(+), 91 deletions(-) > create mode 100644 Platform/Hisilicon/D06/D06.dec > create mode 100644 Silicon/Hisilicon/Hi1610/Hi1610.dec > create mode 100644 Silicon/Hisilicon/Hi1616/Hi1616.dec > create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620.dec > create mode 100644 Platform/Hisilicon/D06/D06.dsc > create mode 100644 Platform/Hisilicon/D06/D06.fdf > create mode 100644 Platform/Hisilicon/D06/Drivers/OemNicConfig2PHi1620/OemNicConfig2P.inf > create mode 100644 Platform/Hisilicon/D06/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptor.inf > create mode 100644 Platform/Hisilicon/D06/EarlyConfigPeim/EarlyConfigPeimD06.inf > create mode 100644 Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.inf > create mode 100644 Platform/Hisilicon/D06/Library/OemNicLib/OemNicLib.inf > create mode 100644 Platform/Hisilicon/D06/Library/PciHostBridgeLib/PciHostBridgeLib.inf > create mode 100644 Silicon/Hisilicon/Hi1620/Drivers/Apei/Apei.inf > create mode 100644 Silicon/Hisilicon/Hi1620/Drivers/Pl011DebugSerialPortInitDxe/Pl011DebugSerialPortInitDxe.inf > create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/AcpiTablesHi1620.inf > create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfigUiLib.inf > create mode 100644 Silicon/Hisilicon/Hi1620/Library/Hi1620PciPlatformLib/Hi1620PciPlatformLib.inf > create mode 100644 Silicon/Hisilicon/Hi1620/Pptt/Pptt.inf > create mode 100644 Silicon/Hisilicon/Library/M41T83RealTimeClockLib/M41T83RealTimeClockLib.inf > create mode 100644 Platform/Hisilicon/D06/Drivers/OemNicConfig2PHi1620/OemNicConfig.h > create mode 100644 Platform/Hisilicon/D06/Include/Library/CpldD06.h > create mode 100644 Silicon/Hisilicon/Hi1620/Drivers/Apei/Apei.h > create mode 100644 Silicon/Hisilicon/Hi1620/Drivers/Apei/Bert/Bert.h > create mode 100644 Silicon/Hisilicon/Hi1620/Drivers/Apei/Einj/Einj.h > create mode 100644 Silicon/Hisilicon/Hi1620/Drivers/Apei/ErrorSource/Ghes.h > create mode 100644 Silicon/Hisilicon/Hi1620/Drivers/Apei/Erst/Erst.h > create mode 100644 Silicon/Hisilicon/Hi1620/Drivers/Apei/Hest/Hest.h > create mode 100644 Silicon/Hisilicon/Hi1620/Drivers/Apei/OemApeiHi1620.h > create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Hi1620Platform.h > create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfig.h > create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfigUi.h > create mode 100644 Silicon/Hisilicon/Hi1620/Include/Library/SerdesLib.h > create mode 100644 Silicon/Hisilicon/Hi1620/Include/PlatformArch.h > create mode 100644 Silicon/Hisilicon/Hi1620/Pptt/Pptt.h > create mode 100644 Silicon/Hisilicon/Include/Library/OemConfigData.h > create mode 100644 Silicon/Hisilicon/Include/Library/OemNicLib.h > create mode 100644 Silicon/Hisilicon/Library/M41T83RealTimeClockLib/M41T83RealTimeClock.h > create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfigVfr.vfr > create mode 100644 Platform/Hisilicon/D06/Drivers/OemNicConfig2PHi1620/OemNicConfig2P.c > create mode 100644 Platform/Hisilicon/D06/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptorPei.c > create mode 100644 Platform/Hisilicon/D06/EarlyConfigPeim/EarlyConfigPeimD06.c > create mode 100644 Platform/Hisilicon/D06/Library/OemMiscLibD06/BoardFeatureD06.c > create mode 100644 Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.c > create mode 100644 Platform/Hisilicon/D06/Library/OemNicLib/OemNicLib.c > create mode 100644 Platform/Hisilicon/D06/Library/PciHostBridgeLib/PciHostBridgeLib.c > create mode 100644 Silicon/Hisilicon/Hi1620/Drivers/Apei/Apei.c > create mode 100644 Silicon/Hisilicon/Hi1620/Drivers/Apei/Bert/Bert.c > create mode 100644 Silicon/Hisilicon/Hi1620/Drivers/Apei/Einj/Einj.c > create mode 100644 Silicon/Hisilicon/Hi1620/Drivers/Apei/ErrorSource/Ghes.c > create mode 100644 Silicon/Hisilicon/Hi1620/Drivers/Apei/Erst/Erst.c > create mode 100644 Silicon/Hisilicon/Hi1620/Drivers/Apei/Hest/Hest.c > create mode 100644 Silicon/Hisilicon/Hi1620/Drivers/Apei/OemApeiHi1620.c > create mode 100644 Silicon/Hisilicon/Hi1620/Drivers/Pl011DebugSerialPortInitDxe/Pl011DebugSerialPortInitDxe.c > create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfig.c > create mode 100644 Silicon/Hisilicon/Hi1620/Library/Hi1620PciPlatformLib/Hi1620PciPlatformLib.c > create mode 100644 Silicon/Hisilicon/Hi1620/Pptt/Pptt.c > create mode 100644 Silicon/Hisilicon/Library/M41T83RealTimeClockLib/M41T83RealTimeClockLib.c > create mode 100644 Platform/Hisilicon/D06/Capsule/SystemFirmwareUpdateConfig/SystemFirmwareUpdateConfig.ini > create mode 100644 Platform/Hisilicon/D06/Drivers/SystemFirmwareDescriptor/SystemFirmwareDescriptor.aslc > create mode 100644 Platform/Hisilicon/D06/Library/OemMiscLibD06/BoardFeatureD06Strings.uni > create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/CPU.asl > create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Com.asl > create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/DsdtHi1620.asl > create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Apei.asl > create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Ged.asl > create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Mbig.asl > create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Mctp.asl > create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Pci.asl > create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Power.asl > create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Rde.asl > create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Sec.asl > create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Socip4_i2c100k.asl > create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Socip4_i2c400k.asl > create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/LpcUart_clk.asl > create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Pv680UncorePmu.asl > create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/ipmi.asl > create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Facs.aslc > create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Fadt.aslc > create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Gtdt.aslc > create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Hi1620Dbg2.aslc > create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Hi1620Iort.asl > create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Hi1620IortNoSmmu.asl > create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Hi1620Mcfg.aslc > create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Hi1620Slit.aslc > create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Hi1620Spcr.aslc > create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Hi1620Srat.aslc > create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/MadtHi1620.aslc > create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/MemoryConfig.hfr > create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/MemoryConfig.uni > create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/MiscConfig.hfr > create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/MiscConfig.uni > create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfigUiLib.uni > create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/OemConfigUiLibStrings.uni > create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/PcieConfig.hfr > create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/PcieConfigStrings.uni > create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/PciePortConfig.hfr > create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/RasConfig.hfr > create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/RasConfig.uni > create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/iBMCConfig.hfr > create mode 100644 Silicon/Hisilicon/Hi1620/Hi1620OemConfigUiLib/iBMCConfig.uni > > -- > 2.18.0 > _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel