From patchwork Fri Nov 16 06:56:47 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ming Huang X-Patchwork-Id: 151286 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp69195ljp; Thu, 15 Nov 2018 22:57:23 -0800 (PST) X-Google-Smtp-Source: AJdET5cfRwAGAvIaDYI0e9hQc+tpUxUlgUtUoptOJXNwykn0gmS8iZTSYf11xN1dS75bifHrjtDl X-Received: by 2002:a63:cd17:: with SMTP id i23mr8772100pgg.13.1542351443158; Thu, 15 Nov 2018 22:57:23 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1542351443; cv=none; d=google.com; s=arc-20160816; b=c1hC/3bXTKbdXtvDFaskXmCM3TL9MA8Bh2klMHqWF5jatkYESdW0n8pFY/QOdm4j5v Tzl9EWLO2rhjYwGozc7HRJcuI8jowWjuMa0e2c/+wS+iapF/cnM68eAqcSLg6TenjXJj T1Iz6Nh8ry5M+NhGxydFK556skrwQGhFWy0aYClzSpjr3RqUDZMtn68x0oNvqr1Qu5cI emT0lmQGH84skEfl3g0JGjjkHJTnJGQDYcg8312RHxbU4YpofSl0YCvtuWbElG7AU2i1 q9ElgluR05sFEbZzFmaovVEeV6oCmyB4Jn+sHUGbPw8GQ43oHjVO2RLOT/DB9X61dKke LThQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version:cc :list-subscribe:list-help:list-post:list-archive:list-unsubscribe :list-id:precedence:subject:message-id:date:to:from:dkim-signature :delivered-to; bh=zRsXfu6PjQocn8XqQ6eQjJ3d7N5LC95D2Tkxu8ha2Ng=; b=yFowBnQiULGbLf8VeiG8ovB5iVTenE9Iev/VY/kBavzE8RwSpUBs3zPRlb1WEGhffX C7fY5Zk4OMnsE+oC0TB/Lt41d5O31ZKRlKeT2bUKL82HPIaz8ZfxonGK+4DlWSTzTXWf E6pMwGbUXHttzo3RABIih3KKZv1dxG2isElqIRaUvUcgMe0POkXdCRyUqT39q6LmUvWX 42TcclnNEq8cQkLjVRBUINmGf9xikOwKoeYRvWhJ7WW7wMq8gqseKeiYL/uvxCT3ZYQi fdCESb+anfgFUBdjf5xglNx27f5KB5kDw3UGOVW8fnHDp3elJ6ekjRUMxGJpOixjOLNw Se7g== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=dLSpMu5k; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 2001:19d0:306:5::1 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from ml01.01.org (ml01.01.org. [2001:19d0:306:5::1]) by mx.google.com with ESMTPS id e68-v6si32400461plb.172.2018.11.15.22.57.22 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 15 Nov 2018 22:57:23 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 2001:19d0:306:5::1 as permitted sender) client-ip=2001:19d0:306:5::1; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=dLSpMu5k; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 2001:19d0:306:5::1 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 94ED521191751; Thu, 15 Nov 2018 22:57:21 -0800 (PST) X-Original-To: edk2-devel@lists.01.org Delivered-To: edk2-devel@lists.01.org Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2607:f8b0:4864:20::641; helo=mail-pl1-x641.google.com; envelope-from=ming.huang@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-pl1-x641.google.com (mail-pl1-x641.google.com [IPv6:2607:f8b0:4864:20::641]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 2B23421191747 for ; Thu, 15 Nov 2018 22:57:21 -0800 (PST) Received: by mail-pl1-x641.google.com with SMTP id x21-v6so7972096pln.9 for ; Thu, 15 Nov 2018 22:57:21 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id; bh=v0NmCJ9quDQaNKl+J+M5V+hapYOkujHgtGeSsjdJVB0=; b=dLSpMu5kFKr8k577BmIcRUmEOx4BJtrUWrSMvHp8Zw76xpRFzOvU7R5Y6NayTLvo88 M2h9qhkZHH/S7iXyMqF2cjFfZUcpFXktgnYSUTSlmrrv8jAa86UJp3yN5VEDD52dVb8S LWi2TnvhFw5zZBEwxcFtbYj7POrPAQrQQCWws= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=v0NmCJ9quDQaNKl+J+M5V+hapYOkujHgtGeSsjdJVB0=; b=uEPVDoI+hxLm1NZSY0JN+12TGdOQ149PTS/XGkZnUkce8hmKbL4G0cqpEr2XyqbcB/ T4z3SlmfJ+Jgqfn1ZKphjHkQj2WIXv3pYh/CM/zRKKb4yyM5Y7ZDdE6RQd32U47R2t74 h6nsOm90Hywxp++k4ARKqP+MefBvt88lSmb7M7qrwEtCEzElFSEa2lQR8ZhwtN9/lvOA fSxOl15qTy8oKqyjRU9Iui0QUXkL+nA8ut1PjZKchnb8lzjmW2T15XZ9XVI3YMwJ9Uqv AiZ2ofcMId591AiwJxHuKtpdQNXnr1hsZgz4zBQNgfApKmrMWmqoPxVLK7stU4BGRQBu 21vA== X-Gm-Message-State: AGRZ1gJr5noplgjDzcFITpUEHCRX4FAunkGHl0b46Rr8o/kzwY/I8nwC TPHOQdJvX2kj/uojxOtcyPHxLQ== X-Received: by 2002:a17:902:ac8f:: with SMTP id h15mr9271488plr.245.1542351440407; Thu, 15 Nov 2018 22:57:20 -0800 (PST) Received: from localhost.localdomain ([203.160.91.226]) by smtp.gmail.com with ESMTPSA id h134sm2835905pfe.27.2018.11.15.22.57.16 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 15 Nov 2018 22:57:19 -0800 (PST) From: Ming Huang To: leif.lindholm@linaro.org, linaro-uefi@lists.linaro.org, edk2-devel@lists.01.org, graeme.gregory@linaro.org Date: Fri, 16 Nov 2018 14:56:47 +0800 Message-Id: <20181116065702.30559-1-ming.huang@linaro.org> X-Mailer: git-send-email 2.9.5 Subject: [edk2] [PATCH edk2-platforms v2 00/15] Fix D06 SBSA/SBBR issue and improve X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: huangming23@huawei.com, xinliang.liu@linaro.org, john.garry@huawei.com, zhangjinsong2@huawei.com, huangdaode@hisilicon.com, zhangfeng56@huawei.com, michael.d.kinney@intel.com, lersek@redhat.com, wanghuiqiang@huawei.com MIME-Version: 1.0 Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" Main Change since v1: 1. Add IORT patch; 2. Add HIDs/UIDs bug for PciHostBridgeLib; 3. Drop Pv660; 4. Drop two patchs: Modify for SBBR fwts SetTime_Func test case; Fix SBBR-SCT AuthVar issue Code can also be found in github: https://github.com/hisilicon/OpenPlatformPkg.git branch: d06-acs-platforms-v2 Ming Huang (15): Hisilicon/D0x: Modify IORT Silicon/Hisilicon/D06: Add watchdog to GTDT Silicon/Hisilicon/D06: Drop _CID for fwts issue Silicon/Hisilicon/D06: Fix fwts issue in Dbg2 Silicon/Hisilicon/D06: Fix fwts issue in FADT Hisilicon/D06: Move some functions to OemMiscLib Hisilicon/D0x: Fix secure boot bug in FlashFvbDxe Silicon/Hisilicon/D06: Reserve ECAM resource in DSDT Silicon/Hisilicon/D06: Modify GTDT timer flag Hisilicon/D06: Modify Gic base Silicon/Hisilicon/D06: Set TA as Node 0 for TA boot Silicon/Hisilicon/D03: Drop _CID for fwts issue Silicon/Hisilicon/D05: Drop _CID for fwts issue Hisilicon: Drop Pv660 source code Hisilicon/D06: Correct HIDs/UIDs of PCI host bridges Silicon/Hisilicon/HisiPkg.dec | 1 + Platform/Hisilicon/D03/D03.dsc | 5 + Platform/Hisilicon/D05/D05.dsc | 5 + Platform/Hisilicon/D06/D06.dsc | 7 +- Silicon/Hisilicon/Drivers/FlashFvbDxe/FlashFvbDxe.inf | 2 + Silicon/Hisilicon/Library/ArmPlatformLibHisilicon/ArmPlatformLib.inf | 2 +- Silicon/Hisilicon/Library/ArmPlatformLibHisilicon/ArmPlatformLibSec.inf | 2 +- Silicon/Hisilicon/Library/M41T83RealTimeClockLib/M41T83RealTimeClockLib.inf | 1 - Silicon/Hisilicon/Pv660/Drivers/IoInitDxe/IoInitDxe.inf | 58 -- Silicon/Hisilicon/Pv660/Drivers/PcieInitDxe/PcieInitDxe.inf | 56 -- Silicon/Hisilicon/Pv660/Drivers/SasInitDxe/SasV1Init.inf | 48 - Silicon/Hisilicon/Pv660/Drivers/UnInstallAcpiTableDxe/UnInstallAcpiTable.inf | 57 -- Silicon/Hisilicon/Pv660/Pv660AcpiTables/AcpiTables.inf | 60 -- Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Hi1620Platform.h | 2 +- Silicon/Hisilicon/Include/Library/OemMiscLib.h | 9 + Silicon/Hisilicon/Library/M41T83RealTimeClockLib/M41T83RealTimeClock.h | 4 - Silicon/Hisilicon/Pv660/Drivers/IoInitDxe/Smmu.h | 36 - Silicon/Hisilicon/Pv660/Drivers/PcieInitDxe/PcieInit.h | 93 -- Silicon/Hisilicon/Pv660/Drivers/PcieInitDxe/PcieInitLib.h | 239 ----- Silicon/Hisilicon/Pv660/Drivers/PcieInitDxe/PcieKernelApi.h | 346 ------- Silicon/Hisilicon/Pv660/Drivers/UnInstallAcpiTableDxe/UnInstallAcpiTable.h | 30 - Silicon/Hisilicon/Pv660/Include/Library/SerdesLib.h | 120 --- Silicon/Hisilicon/Pv660/Pv660AcpiTables/Pv660Platform.h | 48 - Platform/Hisilicon/D06/Library/OemMiscLibD06/OemMiscLibD06.c | 82 ++ Platform/Hisilicon/D06/Library/PciHostBridgeLib/PciHostBridgeLib.c | 28 +- Silicon/Hisilicon/Drivers/FlashFvbDxe/FlashFvbDxe.c | 14 +- Silicon/Hisilicon/Library/M41T83RealTimeClockLib/M41T83RealTimeClockLib.c | 90 +- Silicon/Hisilicon/Pv660/Drivers/IoInitDxe/IoInitDxe.c | 94 -- Silicon/Hisilicon/Pv660/Drivers/IoInitDxe/Smmu.c | 442 --------- Silicon/Hisilicon/Pv660/Drivers/PcieInitDxe/PcieInit.c | 103 -- Silicon/Hisilicon/Pv660/Drivers/PcieInitDxe/PcieInitLib.c | 1048 -------------------- Silicon/Hisilicon/Pv660/Drivers/SasInitDxe/SasV1Init.c | 114 --- Silicon/Hisilicon/Pv660/Drivers/UnInstallAcpiTableDxe/UnInstallAcpiTable.c | 119 --- Silicon/Hisilicon/Hi1610/Hi1610AcpiTables/D03Iort.asl | 24 +- Silicon/Hisilicon/Hi1610/Hi1610AcpiTables/Dsdt/Com.asl | 1 - Silicon/Hisilicon/Hi1610/Hi1610AcpiTables/Dsdt/D03Mbig.asl | 8 - Silicon/Hisilicon/Hi1616/D05AcpiTables/D05Iort.asl | 64 +- Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/Com.asl | 1 - Silicon/Hisilicon/Hi1616/D05AcpiTables/Dsdt/D05Mbig.asl | 13 - Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Com.asl | 1 - Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Mbig.asl | 48 - Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Dsdt/Hi1620Pci.asl | 36 +- Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Fadt.aslc | 2 +- Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Gtdt.aslc | 35 +- Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Hi1620Dbg2.aslc | 4 +- Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Hi1620Iort.asl | 40 +- Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Hi1620IortNoSmmu.asl | 6 +- Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/Hi1620Srat.aslc | 194 ++-- Silicon/Hisilicon/Hi1620/Hi1620AcpiTables/MadtHi1620.aslc | 2 +- Silicon/Hisilicon/Pv660/Pv660AcpiTables/Dbg2.aslc | 94 -- Silicon/Hisilicon/Pv660/Pv660AcpiTables/Dsdt/CPU.asl | 88 -- Silicon/Hisilicon/Pv660/Pv660AcpiTables/Dsdt/Com.asl | 38 - Silicon/Hisilicon/Pv660/Pv660AcpiTables/Dsdt/Ctl.asl | 38 - Silicon/Hisilicon/Pv660/Pv660AcpiTables/Dsdt/Dsdt.asl | 29 - Silicon/Hisilicon/Pv660/Pv660AcpiTables/Dsdt/Hns.asl | 956 ------------------ Silicon/Hisilicon/Pv660/Pv660AcpiTables/Dsdt/Mbig.asl | 86 -- Silicon/Hisilicon/Pv660/Pv660AcpiTables/Dsdt/Pci.asl | 181 ---- Silicon/Hisilicon/Pv660/Pv660AcpiTables/Dsdt/Usb.asl | 136 --- Silicon/Hisilicon/Pv660/Pv660AcpiTables/Facs.aslc | 67 -- Silicon/Hisilicon/Pv660/Pv660AcpiTables/Fadt.aslc | 93 -- Silicon/Hisilicon/Pv660/Pv660AcpiTables/Gtdt.aslc | 96 -- Silicon/Hisilicon/Pv660/Pv660AcpiTables/Iort.asl | 274 ----- Silicon/Hisilicon/Pv660/Pv660AcpiTables/Madt.aslc | 130 --- Silicon/Hisilicon/Pv660/Pv660AcpiTables/Mcfg.aslc | 80 -- Silicon/Hisilicon/Pv660/Pv660AcpiTables/SASSSDT.ASL | 169 ---- Silicon/Hisilicon/Pv660/Pv660AcpiTables/SATASSDT.ASL | 51 - Silicon/Hisilicon/Pv660/Pv660AcpiTables/Spcr.aslc | 64 -- 67 files changed, 361 insertions(+), 6153 deletions(-) delete mode 100644 Silicon/Hisilicon/Pv660/Drivers/IoInitDxe/IoInitDxe.inf delete mode 100644 Silicon/Hisilicon/Pv660/Drivers/PcieInitDxe/PcieInitDxe.inf delete mode 100644 Silicon/Hisilicon/Pv660/Drivers/SasInitDxe/SasV1Init.inf delete mode 100644 Silicon/Hisilicon/Pv660/Drivers/UnInstallAcpiTableDxe/UnInstallAcpiTable.inf delete mode 100644 Silicon/Hisilicon/Pv660/Pv660AcpiTables/AcpiTables.inf delete mode 100644 Silicon/Hisilicon/Pv660/Drivers/IoInitDxe/Smmu.h delete mode 100644 Silicon/Hisilicon/Pv660/Drivers/PcieInitDxe/PcieInit.h delete mode 100644 Silicon/Hisilicon/Pv660/Drivers/PcieInitDxe/PcieInitLib.h delete mode 100644 Silicon/Hisilicon/Pv660/Drivers/PcieInitDxe/PcieKernelApi.h delete mode 100644 Silicon/Hisilicon/Pv660/Drivers/UnInstallAcpiTableDxe/UnInstallAcpiTable.h delete mode 100644 Silicon/Hisilicon/Pv660/Include/Library/SerdesLib.h delete mode 100644 Silicon/Hisilicon/Pv660/Pv660AcpiTables/Pv660Platform.h delete mode 100644 Silicon/Hisilicon/Pv660/Drivers/IoInitDxe/IoInitDxe.c delete mode 100644 Silicon/Hisilicon/Pv660/Drivers/IoInitDxe/Smmu.c delete mode 100644 Silicon/Hisilicon/Pv660/Drivers/PcieInitDxe/PcieInit.c delete mode 100644 Silicon/Hisilicon/Pv660/Drivers/PcieInitDxe/PcieInitLib.c delete mode 100644 Silicon/Hisilicon/Pv660/Drivers/SasInitDxe/SasV1Init.c delete mode 100644 Silicon/Hisilicon/Pv660/Drivers/UnInstallAcpiTableDxe/UnInstallAcpiTable.c delete mode 100644 Silicon/Hisilicon/Pv660/Pv660AcpiTables/Dbg2.aslc delete mode 100644 Silicon/Hisilicon/Pv660/Pv660AcpiTables/Dsdt/CPU.asl delete mode 100644 Silicon/Hisilicon/Pv660/Pv660AcpiTables/Dsdt/Com.asl delete mode 100644 Silicon/Hisilicon/Pv660/Pv660AcpiTables/Dsdt/Ctl.asl delete mode 100644 Silicon/Hisilicon/Pv660/Pv660AcpiTables/Dsdt/Dsdt.asl delete mode 100644 Silicon/Hisilicon/Pv660/Pv660AcpiTables/Dsdt/Hns.asl delete mode 100644 Silicon/Hisilicon/Pv660/Pv660AcpiTables/Dsdt/Mbig.asl delete mode 100644 Silicon/Hisilicon/Pv660/Pv660AcpiTables/Dsdt/Pci.asl delete mode 100644 Silicon/Hisilicon/Pv660/Pv660AcpiTables/Dsdt/Usb.asl delete mode 100644 Silicon/Hisilicon/Pv660/Pv660AcpiTables/Facs.aslc delete mode 100644 Silicon/Hisilicon/Pv660/Pv660AcpiTables/Fadt.aslc delete mode 100644 Silicon/Hisilicon/Pv660/Pv660AcpiTables/Gtdt.aslc delete mode 100644 Silicon/Hisilicon/Pv660/Pv660AcpiTables/Iort.asl delete mode 100644 Silicon/Hisilicon/Pv660/Pv660AcpiTables/Madt.aslc delete mode 100644 Silicon/Hisilicon/Pv660/Pv660AcpiTables/Mcfg.aslc delete mode 100644 Silicon/Hisilicon/Pv660/Pv660AcpiTables/SASSSDT.ASL delete mode 100644 Silicon/Hisilicon/Pv660/Pv660AcpiTables/SATASSDT.ASL delete mode 100644 Silicon/Hisilicon/Pv660/Pv660AcpiTables/Spcr.aslc -- 2.9.5 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel Reviewed-by: Leif Lindholm