From patchwork Sat May 2 00:02:39 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Honnappa Nagarahalli X-Patchwork-Id: 186044 Delivered-To: patch@linaro.org Received: by 2002:a50:3a95:0:0:0:0:0 with SMTP id v21csp791389ecc; Fri, 1 May 2020 17:03:05 -0700 (PDT) X-Google-Smtp-Source: APiQypIyUac5zLTMePrQvarO/JWU5AnT0KopgQZEvRJW+pwh1vXrwBxvNPSVnf4WRzftEszl22EI X-Received: by 2002:a17:906:1d13:: with SMTP id n19mr5440776ejh.287.1588377785032; Fri, 01 May 2020 17:03:05 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1588377785; cv=none; d=google.com; s=arc-20160816; b=FIPo0F98h+IKMd6Zy84owDbi1pSftMvdbNu9uzqI6/HzEHfGmT/81l8+7m3JGjT4I2 y9OOvJjFxtfpBsA4AEXr88DRrkWS9pAYP+jg7s0MkgQfu7v7lITC6+Hr1vSYERxHmANz O7Xxe5KUigFR947L8Z/GDM7t6dj5g5LCn+bZ9iT/uiu3NA1xT+2aus6nGDmOfZScKBZE whRumYIIftuYhyRC3FezejuBX1SuUg1FYrvDa2Pt1M8XmTa0MrUH49Gg5iIGz1rhZlP7 56GIhxxmac5y6AApsnXQO411z1M72Md/vHPmB4cWIcNxp5gHOxFKk5rs4xTaqf7ET2Z7 +5Yw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject:references:in-reply-to :message-id:date:cc:to:from; bh=CIH0K9bIuDCiqUcB3nv1eyWDtb6+VNDHoN3z+FP14AI=; b=Qgi1q3g9kKscX544yn1spKpbKJjAJTpUEmSoQ4Wdmqj3X2iqQnADohKfQKjhNVLbMY C8OPxI8Y7XTTFIA+R/NwFUxxeJ9nDrRVjeUJQ5AoQuTPzjHyjrhtj8CQMPN4qbQrW9SG wzFVWwjfJUsveYI4kbtjxz4OIpctDRLI6A973rl0BAcxz0WCC8TKgRmySYErdutITY04 CPQS2H67OMHPBJRXDA+DhXS/vmItMS4iRZAHffkcurcIJARqznq8NhWaIZ/XYb9Cs13G mKi8cX5lL6fSv3MN+WYEYDLIDexMEW/3fHzXYPtwt4ldLBfSFwR4Rbl/Xyg6B1ey1L2Z F82Q== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of dev-bounces@dpdk.org designates 92.243.14.124 as permitted sender) smtp.mailfrom=dev-bounces@dpdk.org Return-Path: Received: from dpdk.org (dpdk.org. [92.243.14.124]) by mx.google.com with ESMTP id y13si2683336edq.430.2020.05.01.17.03.03; Fri, 01 May 2020 17:03:05 -0700 (PDT) Received-SPF: pass (google.com: domain of dev-bounces@dpdk.org designates 92.243.14.124 as permitted sender) client-ip=92.243.14.124; Authentication-Results: mx.google.com; spf=pass (google.com: domain of dev-bounces@dpdk.org designates 92.243.14.124 as permitted sender) smtp.mailfrom=dev-bounces@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 4936A1D92D; Sat, 2 May 2020 02:03:03 +0200 (CEST) Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by dpdk.org (Postfix) with ESMTP id 374331D62C for ; Sat, 2 May 2020 02:03:02 +0200 (CEST) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 64CF21045; Fri, 1 May 2020 17:03:01 -0700 (PDT) Received: from qc2400f-1.austin.arm.com (qc2400f-1.austin.arm.com [10.118.14.48]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 51B6F3F305; Fri, 1 May 2020 17:03:01 -0700 (PDT) From: Honnappa Nagarahalli To: dev@dpdk.org, phil.yang@arm.com, harry.van.haaren@intel.com Cc: thomas@monjalon.net, david.marchand@redhat.com, konstantin.ananyev@intel.com, jerinj@marvell.com, hemant.agrawal@nxp.com, gage.eads@intel.com, bruce.richardson@intel.com, honnappa.nagarahalli@arm.com, nd@arm.com Date: Fri, 1 May 2020 19:02:39 -0500 Message-Id: <20200502000245.11071-1-honnappa.nagarahalli@arm.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <1587659482-27133-1-git-send-email-phil.yang@arm.com> References: <1587659482-27133-1-git-send-email-phil.yang@arm.com> Subject: [dpdk-dev] [PATCH v3 0/6] use c11 atomics for service core lib X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" The rte_atomic ops and rte_smp barriers enforce DMB barriers on aarch64. Using c11 atomics with explicit memory ordering instead of the rte_atomic ops and rte_smp barriers for inter-threads synchronization can uplift the performance on aarch64 and no performance loss on x86. This patchset contains: 1) fix race condition for MT unsafe service. 2) clean up redundant code. 3) use c11 atomics for service core lib to avoid unnecessary barriers. v2: Still waiting on Harry for the final solution on the MT unsafe race condition issue. But I have incorporated the comments so far. 1. add 'Fixes' tag for bug-fix patches. 2. remove 'Fixes' tag for code cleanup patches. 3. remove unused parameter for service_dump_one function. 4. replace the execute_lock atomic CAS operation to spinlock_try_lock. 5. use c11 atomics with RELAXED memory ordering for num_mapped_cores. 6. relax barriers for guard variables runstate, comp_runstate and app_runstate with c11 one-way barriers. v3: Sending this version since Phil is on holiday. 1. Updated the API documentation to indicate how the locking can be avoided. Honnappa Nagarahalli (2): service: fix race condition for MT unsafe service service: identify service running on another core correctly Phil Yang (4): service: remove rte prefix from static functions service: remove redundant code service: optimize with c11 atomics service: relax barriers with C11 atomics lib/librte_eal/common/rte_service.c | 234 ++++++++++-------- lib/librte_eal/include/rte_service.h | 8 +- .../include/rte_service_component.h | 6 +- lib/librte_eal/meson.build | 4 + 4 files changed, 141 insertions(+), 111 deletions(-) -- 2.17.1