[0/4] Restore big.LITTLE cpuidle driver for Exynos

Message ID 20200616081230.31198-1-m.szyprowski@samsung.com
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  • Restore big.LITTLE cpuidle driver for Exynos
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Marek Szyprowski June 16, 2020, 8:12 a.m.
The ARM big.LITTLE cpuidle driver has been enabled and tested on Samsung
Exynos 5420/5800 based Peach Pit/Pi Chromebooks and in fact it worked
only on those boards.

However, support for it was broken by the commit 833b5794e330 ("ARM:
EXYNOS: reset Little cores when cpu is up") and then never enabled in the
exynos_defconfig. This patchset provides the needed fix to the common
code and restores support for it. Thanks to Lukasz Luba who motivated me
to take a look into this issue.

Best regards
Marek Szyprowski
Samsung R&D Institute Poland


Patch summary:

Marek Szyprowski (4):
  ARM: exynos: Apply little core workaround only under secure firmware
  cpuidle: big.LITTLE: enable driver only on Peach-Pit/Pi Chromebooks
  ARM: exynos_defconfig: Enable big.LITTLE cpuidle driver
  ARM: multi_v7_defconfig: Enable big.LITTLE cpuidle driver

 arch/arm/configs/exynos_defconfig    |  1 +
 arch/arm/configs/multi_v7_defconfig  |  1 +
 arch/arm/mach-exynos/mcpm-exynos.c   | 10 +++++++---
 drivers/cpuidle/cpuidle-big_little.c |  3 +--
 4 files changed, 10 insertions(+), 5 deletions(-)

-- 
2.17.1

Comments

Marek Szyprowski June 17, 2020, 9:48 a.m. | #1
Hi Anand,

On 16.06.2020 22:58, Anand Moon wrote:
> On Tue, 16 Jun 2020 at 13:44, Marek Szyprowski <m.szyprowski@samsung.com> wrote:
>> The ARM big.LITTLE cpuidle driver has been enabled and tested on Samsung
>> Exynos 5420/5800 based Peach Pit/Pi Chromebooks and in fact it worked
>> only on those boards.
>>
>> However, support for it was broken by the commit 833b5794e330 ("ARM:
>> EXYNOS: reset Little cores when cpu is up") and then never enabled in the
>> exynos_defconfig. This patchset provides the needed fix to the common
>> code and restores support for it. Thanks to Lukasz Luba who motivated me
>> to take a look into this issue.
>>
> Thanks for this updates.
>
> But I feel some DTS changes are missing for example
> d2e5c871ed8a drivers: cpuidle: initialize big.LITTLE driver through DT

This is not strictly needed. The bl-cpuidle matches also to the A7/A15 
CPU product ids and it is properly instantiated on the Peach Pit/Pi 
Chromebooks. Those CPU DT properties were added as a future-proof 
generic solution. I won't hurt to add them though.

> But I feel that this feature is not working as desired since
> still some missing code changes for cluster idle states are missing.
> like clock  PWR_CTR and PWR_CTRL2.

I cannot judge now. All I can test now is a that the boards enters those 
idle states and system works stable. I cannot measure power consumption, 
because currently I have only remote access to the boards.

Best regards
Anand Moon June 17, 2020, 10:57 a.m. | #2
Hi Marek,

On Wed, 17 Jun 2020 at 15:18, Marek Szyprowski <m.szyprowski@samsung.com> wrote:
>
> Hi Anand,
>
> On 16.06.2020 22:58, Anand Moon wrote:
> > On Tue, 16 Jun 2020 at 13:44, Marek Szyprowski <m.szyprowski@samsung.com> wrote:
> >> The ARM big.LITTLE cpuidle driver has been enabled and tested on Samsung
> >> Exynos 5420/5800 based Peach Pit/Pi Chromebooks and in fact it worked
> >> only on those boards.
> >>
> >> However, support for it was broken by the commit 833b5794e330 ("ARM:
> >> EXYNOS: reset Little cores when cpu is up") and then never enabled in the
> >> exynos_defconfig. This patchset provides the needed fix to the common
> >> code and restores support for it. Thanks to Lukasz Luba who motivated me
> >> to take a look into this issue.
> >>
> > Thanks for this updates.
> >
> > But I feel some DTS changes are missing for example
> > d2e5c871ed8a drivers: cpuidle: initialize big.LITTLE driver through DT
>
> This is not strictly needed. The bl-cpuidle matches also to the A7/A15
> CPU product ids and it is properly instantiated on the Peach Pit/Pi
> Chromebooks. Those CPU DT properties were added as a future-proof
> generic solution. I won't hurt to add them though.
>
Ok Thanks.

> > But I feel that this feature is not working as desired since
> > still some missing code changes for cluster idle states are missing.
> > like clock  PWR_CTR and PWR_CTRL2.
>
> I cannot judge now. All I can test now is a that the boards enters those
> idle states and system works stable. I cannot measure power consumption,
> because currently I have only remote access to the boards.
>
Ok, Thanks.

What I meant was in order to cpu cluster to enter into IDLE states,
it's controlled by the EXYNOS5422_PWR_CTRL and EXYNOS5422_PWR_CTRL2 clk fields
See below example from the Exynos5422 cpu idle driver.

[0] https://github.com/hardkernel/linux/blob/odroidxu3-3.10.y/arch/arm/mach-exynos/cpuidle-exynos5422.c#L319-L379

Just link Exynos5250 clk driver we need to Initialize PWR_CTRL and
PWR_CTRL2 for Exynos542x clocks

[1] https://github.com/torvalds/linux/blob/master/drivers/clk/samsung/clk-exynos5250.c#L828-L846

which will help support cpu idle drivers.

-Anand
Lukasz Luba June 17, 2020, 4:26 p.m. | #3
Hi Marek,

I've give it a try with hotplug torture tests and has only one a minor
comment.

On 6/16/20 9:12 AM, Marek Szyprowski wrote:
> The additional soft-reset call during little core power up was needed

> to properly boot all cores on the Exynos5422-based boards with secure

> firmware (like Odroid XU3/XU4 family). This however broke big.LITTLE

> CPUidle driver, which worked only on boards without secure firmware

> (like Peach-Pit/Pi Chromebooks).

> 

> Apply the workaround only when board is running under secure firmware.

> 

> Fixes: 833b 5794 e330 ("ARM: EXYNOS: reset Little cores when cpu is up")

> Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>

> ---

>   arch/arm/mach-exynos/mcpm-exynos.c | 10 +++++++---

>   1 file changed, 7 insertions(+), 3 deletions(-)

> 

> diff --git a/arch/arm/mach-exynos/mcpm-exynos.c b/arch/arm/mach-exynos/mcpm-exynos.c

> index 9a681b421ae1..cd861c57d5ad 100644

> --- a/arch/arm/mach-exynos/mcpm-exynos.c

> +++ b/arch/arm/mach-exynos/mcpm-exynos.c

> @@ -26,6 +26,7 @@

>   #define EXYNOS5420_USE_L2_COMMON_UP_STATE	BIT(30)

>   

>   static void __iomem *ns_sram_base_addr __ro_after_init;

> +static bool secure_firmware __ro_after_init;

>   

>   /*

>    * The common v7_exit_coherency_flush API could not be used because of the

> @@ -58,15 +59,16 @@ static void __iomem *ns_sram_base_addr __ro_after_init;

>   static int exynos_cpu_powerup(unsigned int cpu, unsigned int cluster)

>   {

>   	unsigned int cpunr = cpu + (cluster * EXYNOS5420_CPUS_PER_CLUSTER);

> +	bool state;

>   

>   	pr_debug("%s: cpu %u cluster %u\n", __func__, cpu, cluster);

>   	if (cpu >= EXYNOS5420_CPUS_PER_CLUSTER ||

>   		cluster >= EXYNOS5420_NR_CLUSTERS)

>   		return -EINVAL;

>   

> -	if (!exynos_cpu_power_state(cpunr)) {

> -		exynos_cpu_power_up(cpunr);

> -

> +	state = exynos_cpu_power_state(cpunr);

> +	exynos_cpu_power_up(cpunr);


I can see that you have moved this call up, probably to avoid more
'if-else' stuff. I just wanted to notify you that this function
'exynos_cpu_powerup' is called twice when cpu is going up:
1. by the already running cpu i.e. CPU0 and the 'state' is 0 for i.e.
CPU2
2. by the newly starting cpu i.e. CPU2 by running
'secondary_start_kernel' and the state is 3.

In this scenario the 'exynos_cpu_power_up' will be called twice.
I have checked in hotplug that this is not causing any issues, but
thought maybe it's worth share it with you. Maybe you can double check
in TRM that this is not causing anything.

> +	if (!state && secure_firmware) {

>   		/*

>   		 * This assumes the cluster number of the big cores(Cortex A15)

>   		 * is 0 and the Little cores(Cortex A7) is 1.

> @@ -258,6 +260,8 @@ static int __init exynos_mcpm_init(void)

>   		return -ENOMEM;

>   	}

>   

> +	secure_firmware = exynos_secure_firmware_available();

> +

>   	/*

>   	 * To increase the stability of KFC reset we need to program

>   	 * the PMU SPARE3 register

> 


Other than that, the patch set looks good to me.

Regards,
Lukasz
Krzysztof Kozlowski June 22, 2020, 5:19 p.m. | #4
On Wed, Jun 17, 2020 at 05:26:58PM +0100, Lukasz Luba wrote:
> Hi Marek,
> 
> I've give it a try with hotplug torture tests and has only one a minor
> comment.
> 
> On 6/16/20 9:12 AM, Marek Szyprowski wrote:
> > The additional soft-reset call during little core power up was needed
> > to properly boot all cores on the Exynos5422-based boards with secure
> > firmware (like Odroid XU3/XU4 family). This however broke big.LITTLE
> > CPUidle driver, which worked only on boards without secure firmware
> > (like Peach-Pit/Pi Chromebooks).
> > 
> > Apply the workaround only when board is running under secure firmware.
> > 
> > Fixes: 833b 5794 e330 ("ARM: EXYNOS: reset Little cores when cpu is up")

Fix the Fixes tag (in case of resend, otherwise I'll do it).

> > Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
> > ---
> >   arch/arm/mach-exynos/mcpm-exynos.c | 10 +++++++---
> >   1 file changed, 7 insertions(+), 3 deletions(-)
> > 
> > diff --git a/arch/arm/mach-exynos/mcpm-exynos.c b/arch/arm/mach-exynos/mcpm-exynos.c
> > index 9a681b421ae1..cd861c57d5ad 100644
> > --- a/arch/arm/mach-exynos/mcpm-exynos.c
> > +++ b/arch/arm/mach-exynos/mcpm-exynos.c
> > @@ -26,6 +26,7 @@
> >   #define EXYNOS5420_USE_L2_COMMON_UP_STATE	BIT(30)
> >   static void __iomem *ns_sram_base_addr __ro_after_init;
> > +static bool secure_firmware __ro_after_init;
> >   /*
> >    * The common v7_exit_coherency_flush API could not be used because of the
> > @@ -58,15 +59,16 @@ static void __iomem *ns_sram_base_addr __ro_after_init;
> >   static int exynos_cpu_powerup(unsigned int cpu, unsigned int cluster)
> >   {
> >   	unsigned int cpunr = cpu + (cluster * EXYNOS5420_CPUS_PER_CLUSTER);
> > +	bool state;
> >   	pr_debug("%s: cpu %u cluster %u\n", __func__, cpu, cluster);
> >   	if (cpu >= EXYNOS5420_CPUS_PER_CLUSTER ||
> >   		cluster >= EXYNOS5420_NR_CLUSTERS)
> >   		return -EINVAL;
> > -	if (!exynos_cpu_power_state(cpunr)) {
> > -		exynos_cpu_power_up(cpunr);
> > -
> > +	state = exynos_cpu_power_state(cpunr);
> > +	exynos_cpu_power_up(cpunr);
> 
> I can see that you have moved this call up, probably to avoid more
> 'if-else' stuff. I just wanted to notify you that this function
> 'exynos_cpu_powerup' is called twice when cpu is going up:
> 1. by the already running cpu i.e. CPU0 and the 'state' is 0 for i.e.
> CPU2
> 2. by the newly starting cpu i.e. CPU2 by running
> 'secondary_start_kernel' and the state is 3.
> 
> In this scenario the 'exynos_cpu_power_up' will be called twice.
> I have checked in hotplug that this is not causing any issues, but
> thought maybe it's worth share it with you. Maybe you can double check
> in TRM that this is not causing anything.

This brings the old code, before 833b5794e33. I wonder why? I understood
that only soft-reset should be skipped.

Best regards,
Krzysztof
Krzysztof Kozlowski June 22, 2020, 5:19 p.m. | #5
On Tue, Jun 16, 2020 at 10:12:28AM +0200, Marek Szyprowski wrote:
> This driver always worked properly only on the Exynos 5420/5800 based

> Chromebooks (Peach-Pit/Pi), so change the required compatible string to

> the 'google,peach', to avoid enabling it on the other Exynos 542x/5800

> boards, which hangs in such case. The main difference between Peach-Pit/Pi

> and other Exynos 542x/5800 boards is the firmware - Peach platform doesn't

> use secure firmware at all.

> 

> Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>

> ---

>  drivers/cpuidle/cpuidle-big_little.c | 3 +--

>  1 file changed, 1 insertion(+), 2 deletions(-)


Acked-by: Krzysztof Kozlowski <krzk@kernel.org>


Best regards,
Krzysztof
Krzysztof Kozlowski June 22, 2020, 5:20 p.m. | #6
On Tue, Jun 16, 2020 at 10:12:29AM +0200, Marek Szyprowski wrote:
> Enable big.LITTLE cpuidle driver, which can be used on Exynos-based

> Peach Pit/Pi Chromebooks.

> 

> Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>

> ---

>  arch/arm/configs/exynos_defconfig | 1 +

>  1 file changed, 1 insertion(+)


I guess this should be enabled after adjusting the compatibles
in patch 2/4? If yes, then it will have to wait.

Best regards,
Krzysztof

> 

> diff --git a/arch/arm/configs/exynos_defconfig b/arch/arm/configs/exynos_defconfig

> index 374fbff8eaa6..c928bc710c48 100644

> --- a/arch/arm/configs/exynos_defconfig

> +++ b/arch/arm/configs/exynos_defconfig

> @@ -28,6 +28,7 @@ CONFIG_CPU_FREQ_GOV_CONSERVATIVE=m

>  CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y

>  CONFIG_CPUFREQ_DT=y

>  CONFIG_CPU_IDLE=y

> +CONFIG_ARM_BIG_LITTLE_CPUIDLE=y

>  CONFIG_ARM_EXYNOS_CPUIDLE=y

>  CONFIG_VFP=y

>  CONFIG_NEON=y

> -- 

> 2.17.1

>
Bartlomiej Zolnierkiewicz June 24, 2020, 10:06 a.m. | #7
On 6/16/20 10:12 AM, Marek Szyprowski wrote:
> Enable big.LITTLE cpuidle driver, which can be used on Exynos-based
> Peach Pit/Pi Chromebooks.
> 
> Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>

Reviewed-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>

Best regards,
--
Bartlomiej Zolnierkiewicz
Samsung R&D Institute Poland
Samsung Electronics

> ---
>  arch/arm/configs/exynos_defconfig | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/arch/arm/configs/exynos_defconfig b/arch/arm/configs/exynos_defconfig
> index 374fbff8eaa6..c928bc710c48 100644
> --- a/arch/arm/configs/exynos_defconfig
> +++ b/arch/arm/configs/exynos_defconfig
> @@ -28,6 +28,7 @@ CONFIG_CPU_FREQ_GOV_CONSERVATIVE=m
>  CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y
>  CONFIG_CPUFREQ_DT=y
>  CONFIG_CPU_IDLE=y
> +CONFIG_ARM_BIG_LITTLE_CPUIDLE=y
>  CONFIG_ARM_EXYNOS_CPUIDLE=y
>  CONFIG_VFP=y
>  CONFIG_NEON=y
>
Marek Szyprowski June 29, 2020, 8:54 a.m. | #8
Hi Krzysztof,

On 22.06.2020 19:19, Krzysztof Kozlowski wrote:
> On Wed, Jun 17, 2020 at 05:26:58PM +0100, Lukasz Luba wrote:

>> I've give it a try with hotplug torture tests and has only one a minor

>> comment.

>>

>> On 6/16/20 9:12 AM, Marek Szyprowski wrote:

>>> The additional soft-reset call during little core power up was needed

>>> to properly boot all cores on the Exynos5422-based boards with secure

>>> firmware (like Odroid XU3/XU4 family). This however broke big.LITTLE

>>> CPUidle driver, which worked only on boards without secure firmware

>>> (like Peach-Pit/Pi Chromebooks).

>>>

>>> Apply the workaround only when board is running under secure firmware.

>>>

>>> Fixes: 833b 5794 e330 ("ARM: EXYNOS: reset Little cores when cpu is up")

> Fix the Fixes tag (in case of resend, otherwise I'll do it).

>

>>> Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>

>>> ---

>>>    arch/arm/mach-exynos/mcpm-exynos.c | 10 +++++++---

>>>    1 file changed, 7 insertions(+), 3 deletions(-)

>>>

>>> diff --git a/arch/arm/mach-exynos/mcpm-exynos.c b/arch/arm/mach-exynos/mcpm-exynos.c

>>> index 9a681b421ae1..cd861c57d5ad 100644

>>> --- a/arch/arm/mach-exynos/mcpm-exynos.c

>>> +++ b/arch/arm/mach-exynos/mcpm-exynos.c

>>> @@ -26,6 +26,7 @@

>>>    #define EXYNOS5420_USE_L2_COMMON_UP_STATE	BIT(30)

>>>    static void __iomem *ns_sram_base_addr __ro_after_init;

>>> +static bool secure_firmware __ro_after_init;

>>>    /*

>>>     * The common v7_exit_coherency_flush API could not be used because of the

>>> @@ -58,15 +59,16 @@ static void __iomem *ns_sram_base_addr __ro_after_init;

>>>    static int exynos_cpu_powerup(unsigned int cpu, unsigned int cluster)

>>>    {

>>>    	unsigned int cpunr = cpu + (cluster * EXYNOS5420_CPUS_PER_CLUSTER);

>>> +	bool state;

>>>    	pr_debug("%s: cpu %u cluster %u\n", __func__, cpu, cluster);

>>>    	if (cpu >= EXYNOS5420_CPUS_PER_CLUSTER ||

>>>    		cluster >= EXYNOS5420_NR_CLUSTERS)

>>>    		return -EINVAL;

>>> -	if (!exynos_cpu_power_state(cpunr)) {

>>> -		exynos_cpu_power_up(cpunr);

>>> -

>>> +	state = exynos_cpu_power_state(cpunr);

>>> +	exynos_cpu_power_up(cpunr);

>> I can see that you have moved this call up, probably to avoid more

>> 'if-else' stuff. I just wanted to notify you that this function

>> 'exynos_cpu_powerup' is called twice when cpu is going up:

>> 1. by the already running cpu i.e. CPU0 and the 'state' is 0 for i.e.

>> CPU2

>> 2. by the newly starting cpu i.e. CPU2 by running

>> 'secondary_start_kernel' and the state is 3.

>>

>> In this scenario the 'exynos_cpu_power_up' will be called twice.

>> I have checked in hotplug that this is not causing any issues, but

>> thought maybe it's worth share it with you. Maybe you can double check

>> in TRM that this is not causing anything.

> This brings the old code, before 833b5794e33. I wonder why? I understood

> that only soft-reset should be skipped.


Because otherwise the Peach boards hangs during the cpuidle. I didn't 
analyze the code that much to judge if it is really necessary in all 
cases, I only restored what worked initially. I can add a comment about 
that to the commit log if needed.

Best regards
-- 
Marek Szyprowski, PhD
Samsung R&D Institute Poland
Krzysztof Kozlowski June 29, 2020, 9:13 a.m. | #9
On Mon, Jun 29, 2020 at 10:54:27AM +0200, Marek Szyprowski wrote:
> Hi Krzysztof,
> 
> On 22.06.2020 19:19, Krzysztof Kozlowski wrote:
> > On Wed, Jun 17, 2020 at 05:26:58PM +0100, Lukasz Luba wrote:
> >> I've give it a try with hotplug torture tests and has only one a minor
> >> comment.
> >>
> >> On 6/16/20 9:12 AM, Marek Szyprowski wrote:
> >>> The additional soft-reset call during little core power up was needed
> >>> to properly boot all cores on the Exynos5422-based boards with secure
> >>> firmware (like Odroid XU3/XU4 family). This however broke big.LITTLE
> >>> CPUidle driver, which worked only on boards without secure firmware
> >>> (like Peach-Pit/Pi Chromebooks).
> >>>
> >>> Apply the workaround only when board is running under secure firmware.
> >>>
> >>> Fixes: 833b 5794 e330 ("ARM: EXYNOS: reset Little cores when cpu is up")
> > Fix the Fixes tag (in case of resend, otherwise I'll do it).
> >
> >>> Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
> >>> ---
> >>>    arch/arm/mach-exynos/mcpm-exynos.c | 10 +++++++---
> >>>    1 file changed, 7 insertions(+), 3 deletions(-)
> >>>
> >>> diff --git a/arch/arm/mach-exynos/mcpm-exynos.c b/arch/arm/mach-exynos/mcpm-exynos.c
> >>> index 9a681b421ae1..cd861c57d5ad 100644
> >>> --- a/arch/arm/mach-exynos/mcpm-exynos.c
> >>> +++ b/arch/arm/mach-exynos/mcpm-exynos.c
> >>> @@ -26,6 +26,7 @@
> >>>    #define EXYNOS5420_USE_L2_COMMON_UP_STATE	BIT(30)
> >>>    static void __iomem *ns_sram_base_addr __ro_after_init;
> >>> +static bool secure_firmware __ro_after_init;
> >>>    /*
> >>>     * The common v7_exit_coherency_flush API could not be used because of the
> >>> @@ -58,15 +59,16 @@ static void __iomem *ns_sram_base_addr __ro_after_init;
> >>>    static int exynos_cpu_powerup(unsigned int cpu, unsigned int cluster)
> >>>    {
> >>>    	unsigned int cpunr = cpu + (cluster * EXYNOS5420_CPUS_PER_CLUSTER);
> >>> +	bool state;
> >>>    	pr_debug("%s: cpu %u cluster %u\n", __func__, cpu, cluster);
> >>>    	if (cpu >= EXYNOS5420_CPUS_PER_CLUSTER ||
> >>>    		cluster >= EXYNOS5420_NR_CLUSTERS)
> >>>    		return -EINVAL;
> >>> -	if (!exynos_cpu_power_state(cpunr)) {
> >>> -		exynos_cpu_power_up(cpunr);
> >>> -
> >>> +	state = exynos_cpu_power_state(cpunr);
> >>> +	exynos_cpu_power_up(cpunr);
> >> I can see that you have moved this call up, probably to avoid more
> >> 'if-else' stuff. I just wanted to notify you that this function
> >> 'exynos_cpu_powerup' is called twice when cpu is going up:
> >> 1. by the already running cpu i.e. CPU0 and the 'state' is 0 for i.e.
> >> CPU2
> >> 2. by the newly starting cpu i.e. CPU2 by running
> >> 'secondary_start_kernel' and the state is 3.
> >>
> >> In this scenario the 'exynos_cpu_power_up' will be called twice.
> >> I have checked in hotplug that this is not causing any issues, but
> >> thought maybe it's worth share it with you. Maybe you can double check
> >> in TRM that this is not causing anything.
> > This brings the old code, before 833b5794e33. I wonder why? I understood
> > that only soft-reset should be skipped.
> 
> Because otherwise the Peach boards hangs during the cpuidle. I didn't 
> analyze the code that much to judge if it is really necessary in all 
> cases, I only restored what worked initially. I can add a comment about 
> that to the commit log if needed.

Yes, please mention this in commit msg.

Best regards,
Krzysztof
Marek Szyprowski June 29, 2020, 11:35 a.m. | #10
On 22.06.2020 19:20, Krzysztof Kozlowski wrote:
> On Tue, Jun 16, 2020 at 10:12:29AM +0200, Marek Szyprowski wrote:

>> Enable big.LITTLE cpuidle driver, which can be used on Exynos-based

>> Peach Pit/Pi Chromebooks.

>>

>> Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>

>> ---

>>   arch/arm/configs/exynos_defconfig | 1 +

>>   1 file changed, 1 insertion(+)

> I guess this should be enabled after adjusting the compatibles

> in patch 2/4? If yes, then it will have to wait.


Indeed, this one and multi_v7 patch have to wait one cycle to avoid 
breaking Odroid XU3/XU4 board family.

Best regards

-- 
Marek Szyprowski, PhD
Samsung R&D Institute Poland
Krzysztof Kozlowski Aug. 24, 2020, 8:26 a.m. | #11
On Mon, Aug 24, 2020 at 10:15:42AM +0200, Daniel Lezcano wrote:
> On 17/08/2020 17:39, Krzysztof Kozlowski wrote:
> > On Wed, Jun 24, 2020 at 12:05:46PM +0200, Bartlomiej Zolnierkiewicz wrote:
> >>
> >> On 6/16/20 10:12 AM, Marek Szyprowski wrote:
> >>> This driver always worked properly only on the Exynos 5420/5800 based
> >>> Chromebooks (Peach-Pit/Pi), so change the required compatible string to
> >>> the 'google,peach', to avoid enabling it on the other Exynos 542x/5800
> >>> boards, which hangs in such case. The main difference between Peach-Pit/Pi
> >>> and other Exynos 542x/5800 boards is the firmware - Peach platform doesn't
> >>> use secure firmware at all.
> >>>
> >>> Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
> >>
> >> Reviewed-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
> > 
> > This patch waited on list for almost two months and was not picked up.
> > Therefore I'll take it for v5.10.
> 
> It happens some patches can fall into the cracks, especially when we are
> fully busy with a peak of work. Also, we have filters in our mailers
> which are not perfect. A gentle ping is enough to ask to pay attention
> to the series.
> 
> I can understand that is annoying, but preemptively pick the patch is
> not adequate.

I apologize if my message was harsh or sounded rude. That was not my
intention.

I understand that patches soometimes got missed. That's life. This patch
here is quite simple, non-intrusive, got independent ack. Also in the
past SoC-specific drivers were sometimes going through SoC tree (so in
this case - mine for Samsung).  Patch also blocks the dependant DT
change (for entire cycle). Therefore I guessed that it won't be a
problem and it is just simpler to apply it.

If it is an issue, I can drop it and rebase my branch.

Best regards,
Krzysztof
Daniel Lezcano Aug. 24, 2020, 9:14 a.m. | #12
On 24/08/2020 10:26, Krzysztof Kozlowski wrote:
> On Mon, Aug 24, 2020 at 10:15:42AM +0200, Daniel Lezcano wrote:
>> On 17/08/2020 17:39, Krzysztof Kozlowski wrote:
>>> On Wed, Jun 24, 2020 at 12:05:46PM +0200, Bartlomiej Zolnierkiewicz wrote:
>>>>
>>>> On 6/16/20 10:12 AM, Marek Szyprowski wrote:
>>>>> This driver always worked properly only on the Exynos 5420/5800 based
>>>>> Chromebooks (Peach-Pit/Pi), so change the required compatible string to
>>>>> the 'google,peach', to avoid enabling it on the other Exynos 542x/5800
>>>>> boards, which hangs in such case. The main difference between Peach-Pit/Pi
>>>>> and other Exynos 542x/5800 boards is the firmware - Peach platform doesn't
>>>>> use secure firmware at all.
>>>>>
>>>>> Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
>>>>
>>>> Reviewed-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
>>>
>>> This patch waited on list for almost two months and was not picked up.
>>> Therefore I'll take it for v5.10.
>>
>> It happens some patches can fall into the cracks, especially when we are
>> fully busy with a peak of work. Also, we have filters in our mailers
>> which are not perfect. A gentle ping is enough to ask to pay attention
>> to the series.
>>
>> I can understand that is annoying, but preemptively pick the patch is
>> not adequate.
> 
> I apologize if my message was harsh or sounded rude. That was not my
> intention.

No worries.

> I understand that patches soometimes got missed. That's life. This patch
> here is quite simple, non-intrusive, got independent ack. Also in the
> past SoC-specific drivers were sometimes going through SoC tree (so in
> this case - mine for Samsung).  Patch also blocks the dependant DT
> change (for entire cycle). Therefore I guessed that it won't be a
> problem and it is just simpler to apply it.
> 
> If it is an issue, I can drop it and rebase my branch.

It is fine if you can add my ack.

Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>

Thanks

  -- Daniel