| Message ID | 20210514210015.18142-1-ansuelsmth@gmail.com |
|---|---|
| Headers | show |
| Series | Multiple improvement to qca8k stability | expand |
Hello: This series was applied to netdev/net-next.git (refs/heads/master): On Fri, 14 May 2021 22:59:50 +0200 you wrote: > Currently qca8337 switch are widely used on ipq8064 based router. > On these particular router it was notice a very unstable switch with > port not link detected as link with unknown speed, port dropping > randomly and general unreliability. Lots of testing and comparison > between this dsa driver and the original qsdk driver showed lack of some > additional delay and values. A main difference arised from the original > driver and the dsa one. The original driver didn't use MASTER regs to > read phy status and the dedicated mdio driver worked correctly. Now that > the dsa driver actually use these regs, it was found that these special > read/write operation required mutual exclusion to normal > qca8k_read/write operation. The add of mutex for these operation fixed > the random port dropping and now only the actual linked port randomly > dropped. Adding additional delay for set_page operation and fixing a bug > in the mdio dedicated driver fixed also this problem. The current driver > requires also more time to apply vlan switch. All of these changes and > tweak permit a now very stable and reliable dsa driver and 0 port > dropping. This series is currently tested by at least 5 user with > different routers and all reports positive results and no problems. > > [...] Here is the summary with links: - [net-next,v6,01/25] net: dsa: qca8k: change simple print to dev variant https://git.kernel.org/netdev/net-next/c/5d9e068402dc - [net-next,v6,02/25] net: dsa: qca8k: use iopoll macro for qca8k_busy_wait https://git.kernel.org/netdev/net-next/c/2ad255f2faaf - [net-next,v6,03/25] net: dsa: qca8k: improve qca8k read/write/rmw bus access https://git.kernel.org/netdev/net-next/c/504bf6593182 - [net-next,v6,04/25] net: dsa: qca8k: handle qca8k_set_page errors https://git.kernel.org/netdev/net-next/c/ba5707ec58cf - [net-next,v6,05/25] net: dsa: qca8k: handle error with qca8k_read operation https://git.kernel.org/netdev/net-next/c/028f5f8ef44f - [net-next,v6,06/25] net: dsa: qca8k: handle error with qca8k_write operation https://git.kernel.org/netdev/net-next/c/d7805757c75c - [net-next,v6,07/25] net: dsa: qca8k: handle error with qca8k_rmw operation https://git.kernel.org/netdev/net-next/c/aaf421425cbd - [net-next,v6,08/25] net: dsa: qca8k: handle error from qca8k_busy_wait https://git.kernel.org/netdev/net-next/c/b7c818d19492 - [net-next,v6,09/25] net: dsa: qca8k: add support for qca8327 switch https://git.kernel.org/netdev/net-next/c/6e82a457e062 - [net-next,v6,10/25] devicetree: net: dsa: qca8k: Document new compatible qca8327 https://git.kernel.org/netdev/net-next/c/227a9ffc1bc7 - [net-next,v6,11/25] net: dsa: qca8k: add priority tweak to qca8337 switch https://git.kernel.org/netdev/net-next/c/83a3ceb39b24 - [net-next,v6,12/25] net: dsa: qca8k: limit port5 delay to qca8337 https://git.kernel.org/netdev/net-next/c/5bf9ff3b9fb5 - [net-next,v6,13/25] net: dsa: qca8k: add GLOBAL_FC settings needed for qca8327 https://git.kernel.org/netdev/net-next/c/0fc57e4b5e39 - [net-next,v6,14/25] net: dsa: qca8k: add support for switch rev https://git.kernel.org/netdev/net-next/c/95ffeaf18b3b - [net-next,v6,15/25] net: dsa: qca8k: add ethernet-ports fallback to setup_mdio_bus https://git.kernel.org/netdev/net-next/c/1ee0591a1093 - [net-next,v6,16/25] net: dsa: qca8k: make rgmii delay configurable https://git.kernel.org/netdev/net-next/c/e4b9977cee15 - [net-next,v6,17/25] net: dsa: qca8k: clear MASTER_EN after phy read/write https://git.kernel.org/netdev/net-next/c/63c33bbfeb68 - [net-next,v6,18/25] net: dsa: qca8k: dsa: qca8k: protect MASTER busy_wait with mdio mutex https://git.kernel.org/netdev/net-next/c/60df02b6ea45 - [net-next,v6,19/25] net: dsa: qca8k: enlarge mdio delay and timeout https://git.kernel.org/netdev/net-next/c/617960d72e93 - [net-next,v6,20/25] net: dsa: qca8k: add support for internal phy and internal mdio https://git.kernel.org/netdev/net-next/c/759bafb8a322 - [net-next,v6,21/25] devicetree: bindings: dsa: qca8k: Document internal mdio definition https://git.kernel.org/netdev/net-next/c/0c994a28e751 - [net-next,v6,22/25] net: dsa: qca8k: improve internal mdio read/write bus access https://git.kernel.org/netdev/net-next/c/b7ebac354d54 - [net-next,v6,23/25] net: dsa: qca8k: pass switch_revision info to phy dev_flags https://git.kernel.org/netdev/net-next/c/a46aec02bc06 - [net-next,v6,24/25] net: phy: at803x: clean whitespace errors https://git.kernel.org/netdev/net-next/c/d0e13fd5626c - [net-next,v6,25/25] net: phy: add support for qca8k switch internal PHY in at803x https://git.kernel.org/netdev/net-next/c/272833b9b3b3 You are awesome, thank you! -- Deet-doot-dot, I am a bot. https://korg.docs.kernel.org/patchwork/pwbot.html
On Fri, May 14, 2021 at 10:59:55PM +0200, Ansuel Smith wrote: > -static void > +static int > qca8k_fdb_read(struct qca8k_priv *priv, struct qca8k_fdb *fdb) > { > - u32 reg[4]; > + u32 reg[4], val; val is unsigned. > int i; > > /* load the ARL table into an array */ > - for (i = 0; i < 4; i++) > - reg[i] = qca8k_read(priv, QCA8K_REG_ATU_DATA0 + (i * 4)); > + for (i = 0; i < 4; i++) { > + val = qca8k_read(priv, QCA8K_REG_ATU_DATA0 + (i * 4)); > + if (val < 0) > + return val; So this return statement will never be reached. > @@ -374,6 +386,8 @@ qca8k_fdb_access(struct qca8k_priv *priv, enum qca8k_fdb_cmd cmd, int port) > /* Check for table full violation when adding an entry */ > if (cmd == QCA8K_FDB_LOAD) { > reg = qca8k_read(priv, QCA8K_REG_ATU_FUNC); > + if (reg < 0) > + return reg; "reg" here is also a u32, and therefore unsigned, so this will have no effect. > if (reg & QCA8K_ATU_FUNC_FULL) > return -1; > } > @@ -388,10 +402,10 @@ qca8k_fdb_next(struct qca8k_priv *priv, struct qca8k_fdb *fdb, int port) > > qca8k_fdb_write(priv, fdb->vid, fdb->port_mask, fdb->mac, fdb->aging); > ret = qca8k_fdb_access(priv, QCA8K_FDB_NEXT, port); > - if (ret >= 0) > - qca8k_fdb_read(priv, fdb); > + if (ret < 0) > + return ret; This looks fine to me. > > - return ret; > + return qca8k_fdb_read(priv, fdb); > } > > static int > @@ -449,6 +463,8 @@ qca8k_vlan_access(struct qca8k_priv *priv, enum qca8k_vlan_cmd cmd, u16 vid) > /* Check for table full violation when adding an entry */ > if (cmd == QCA8K_VLAN_LOAD) { > reg = qca8k_read(priv, QCA8K_REG_VTU_FUNC1); > + if (reg < 0) > + return reg; reg is unsigned... unreachable. > if (reg & QCA8K_VTU_FUNC1_FULL) > return -ENOMEM; > } > @@ -475,6 +491,8 @@ qca8k_vlan_add(struct qca8k_priv *priv, u8 port, u16 vid, bool untagged) > goto out; > > reg = qca8k_read(priv, QCA8K_REG_VTU_FUNC0); > + if (reg < 0) > + return reg; reg is unsigned... unreachable. > reg |= QCA8K_VTU_FUNC0_VALID | QCA8K_VTU_FUNC0_IVL_EN; > reg &= ~(QCA8K_VTU_FUNC0_EG_MODE_MASK << QCA8K_VTU_FUNC0_EG_MODE_S(port)); > if (untagged) > @@ -506,6 +524,8 @@ qca8k_vlan_del(struct qca8k_priv *priv, u8 port, u16 vid) > goto out; > > reg = qca8k_read(priv, QCA8K_REG_VTU_FUNC0); > + if (reg < 0) > + return reg; reg is unsigned... unreachable. > reg &= ~(3 << QCA8K_VTU_FUNC0_EG_MODE_S(port)); > reg |= QCA8K_VTU_FUNC0_EG_MODE_NOT << > QCA8K_VTU_FUNC0_EG_MODE_S(port); > @@ -621,8 +641,11 @@ qca8k_mdio_read(struct qca8k_priv *priv, int port, u32 regnum) > QCA8K_MDIO_MASTER_BUSY)) > return -ETIMEDOUT; > > - val = (qca8k_read(priv, QCA8K_MDIO_MASTER_CTRL) & > - QCA8K_MDIO_MASTER_DATA_MASK); > + val = qca8k_read(priv, QCA8K_MDIO_MASTER_CTRL); > + if (val < 0) > + return val; val is unsigned... unreachable. > + > + val &= QCA8K_MDIO_MASTER_DATA_MASK; > > return val; > } > @@ -978,6 +1001,8 @@ qca8k_phylink_mac_link_state(struct dsa_switch *ds, int port, > u32 reg; > > reg = qca8k_read(priv, QCA8K_REG_PORT_STATUS(port)); > + if (reg < 0) > + return reg; reg is unsigned... unreachable. > > state->link = !!(reg & QCA8K_PORT_STATUS_LINK_UP); > state->an_complete = state->link; > @@ -1078,18 +1103,26 @@ qca8k_get_ethtool_stats(struct dsa_switch *ds, int port, > { > struct qca8k_priv *priv = (struct qca8k_priv *)ds->priv; > const struct qca8k_mib_desc *mib; > - u32 reg, i; > + u32 reg, i, val; > u64 hi; > > for (i = 0; i < ARRAY_SIZE(ar8327_mib); i++) { > mib = &ar8327_mib[i]; > reg = QCA8K_PORT_MIB_COUNTER(port) + mib->offset; > > - data[i] = qca8k_read(priv, reg); > + val = qca8k_read(priv, reg); > + if (val < 0) > + continue; val is unsigned... unreachable.... > + > if (mib->size == 2) { > hi = qca8k_read(priv, reg + 4); > - data[i] |= hi << 32; > + if (hi < 0) > + continue; hi is a u64, so this condition is always false. > } > + > + data[i] = val; > + if (mib->size == 2) > + data[i] |= hi << 32; > } > } > > @@ -1107,18 +1140,25 @@ qca8k_set_mac_eee(struct dsa_switch *ds, int port, struct ethtool_eee *eee) > { > struct qca8k_priv *priv = (struct qca8k_priv *)ds->priv; > u32 lpi_en = QCA8K_REG_EEE_CTRL_LPI_EN(port); > + int ret = 0; No need to zero-initialise this. > u32 reg; > > mutex_lock(&priv->reg_mutex); > reg = qca8k_read(priv, QCA8K_REG_EEE_CTRL); > + if (reg < 0) { > + ret = reg; > + goto exit; > + } > + > if (eee->eee_enabled) > reg |= lpi_en; > else > reg &= ~lpi_en; > qca8k_write(priv, QCA8K_REG_EEE_CTRL, reg); > - mutex_unlock(&priv->reg_mutex); > > - return 0; > +exit: > + mutex_unlock(&priv->reg_mutex); > + return ret; > } > > static int > @@ -1443,6 +1483,9 @@ qca8k_sw_probe(struct mdio_device *mdiodev) > > /* read the switches ID register */ > id = qca8k_read(priv, QCA8K_REG_MASK_CTRL); > + if (id < 0) > + return id; id is unsigned ...
Currently qca8337 switch are widely used on ipq8064 based router. On these particular router it was notice a very unstable switch with port not link detected as link with unknown speed, port dropping randomly and general unreliability. Lots of testing and comparison between this dsa driver and the original qsdk driver showed lack of some additional delay and values. A main difference arised from the original driver and the dsa one. The original driver didn't use MASTER regs to read phy status and the dedicated mdio driver worked correctly. Now that the dsa driver actually use these regs, it was found that these special read/write operation required mutual exclusion to normal qca8k_read/write operation. The add of mutex for these operation fixed the random port dropping and now only the actual linked port randomly dropped. Adding additional delay for set_page operation and fixing a bug in the mdio dedicated driver fixed also this problem. The current driver requires also more time to apply vlan switch. All of these changes and tweak permit a now very stable and reliable dsa driver and 0 port dropping. This series is currently tested by at least 5 user with different routers and all reports positive results and no problems. Changes v6: - Fix spelling mistake - Change ms to ns (confirmed by datasheet) Changes v5: - Removed mdio patch (sent separetly to try to reduce the series) I know it was asked to reduced this series since it big, but rework the new changes to skip and error check looks wrong. Since half of them are actually already reviewed I think it's better to keep this series as is. - Improve rgmii configurable patch - Move qca8k phy dedicated driver to at803x phy driver - Add support for dedicated internal mdio driver for qca8k Changes v4: - Use iopoll for busy_wait function - Better describe and split some confusing commits - Fix bad rgmii delay configurable patch - Drop phy generic patch to pass flags with phylink_connect_phy - Add dsa2 patch to declare mdio node in the switch node - Add dsa patch to permit dsa driver to declare custom get_phys_mii_mask Some background about the last 2 patch. The qca8k switch doesn't have a 1:1 map between port reg and phy reg. Currently it's used a function to convert port to the internal phy reg. I added some patch to fix this. - The dsa driver now check if the mdio node is present and use the of variant of the mdiobus_register - A custom phy_mii_mask is required as currently the mask is generated from the port reg, but in our case the mask would be different as it should be generated from the phy reg. To generalize this I added an extra function that driver can provide to pass custom phy_mii_mask. Changes v3: - Revert mdio writel changes (use regmap with REGCACHE disabled) - Split propagate error patch to 4 different patch Changes v2: - Implemented phy driver for internal PHYs I'm testing cable test functions as I found some documentation that actually declare regs about it. Problem is that it doesn't actually work. It seems that the value set are ignored by the phy. - Made the rgmii delay configurable - Reordered patch - Split mdio patches to more specific ones - Reworked mdio driver to use readl/writel instead of regmap - Reworked the entire driver to make it aware of any read/write error. - Added phy generic patch to pass flags with phylink_connect_phy function Ansuel Smith (25): net: dsa: qca8k: change simple print to dev variant net: dsa: qca8k: use iopoll macro for qca8k_busy_wait net: dsa: qca8k: improve qca8k read/write/rmw bus access net: dsa: qca8k: handle qca8k_set_page errors net: dsa: qca8k: handle error with qca8k_read operation net: dsa: qca8k: handle error with qca8k_write operation net: dsa: qca8k: handle error with qca8k_rmw operation net: dsa: qca8k: handle error from qca8k_busy_wait net: dsa: qca8k: add support for qca8327 switch devicetree: net: dsa: qca8k: Document new compatible qca8327 net: dsa: qca8k: add priority tweak to qca8337 switch net: dsa: qca8k: limit port5 delay to qca8337 net: dsa: qca8k: add GLOBAL_FC settings needed for qca8327 net: dsa: qca8k: add support for switch rev net: dsa: qca8k: add ethernet-ports fallback to setup_mdio_bus net: dsa: qca8k: make rgmii delay configurable net: dsa: qca8k: clear MASTER_EN after phy read/write net: dsa: qca8k: dsa: qca8k: protect MASTER busy_wait with mdio mutex net: dsa: qca8k: enlarge mdio delay and timeout net: dsa: qca8k: add support for internal phy and internal mdio devicetree: bindings: dsa: qca8k: Document internal mdio definition net: dsa: qca8k: improve internal mdio read/write bus access net: dsa: qca8k: pass switch_revision info to phy dev_flags net: phy: at803x: clean whitespace errors net: phy: add support for qca8k switch internal PHY in at803x .../devicetree/bindings/net/dsa/qca8k.txt | 40 + drivers/net/dsa/qca8k.c | 758 ++++++++++++++---- drivers/net/dsa/qca8k.h | 58 +- drivers/net/phy/Kconfig | 5 +- drivers/net/phy/at803x.c | 162 +++- 5 files changed, 835 insertions(+), 188 deletions(-)