[PULL,00/57] target-arm queue

Message ID 20210621162833.32535-1-peter.maydell@linaro.org
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  • target-arm queue
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Peter Maydell June 21, 2021, 4:27 p.m.
The following changes since commit 53f306f316549d20c76886903181413d20842423:

  Merge remote-tracking branch 'remotes/ehabkost-gl/tags/x86-next-pull-request' into staging (2021-06-21 11:26:04 +0100)

are available in the Git repository at:

  https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20210621

for you to fetch changes up to a83f1d9263d281f938a3984cda7104d55affd43a:

  docs/system: arm: Add nRF boards description (2021-06-21 17:24:33 +0100)

----------------------------------------------------------------
target-arm queue:
 * Don't require 'virt' board to be compiled in for ACPI GHES code
 * docs: Document which architecture extensions we emulate
 * Fix bugs in M-profile FPCXT_NS accesses
 * First slice of MVE patches
 * Implement MTE3
 * docs/system: arm: Add nRF boards description

----------------------------------------------------------------
Alexandre Iooss (1):
      docs/system: arm: Add nRF boards description

Peter Collingbourne (1):
      target/arm: Implement MTE3

Peter Maydell (55):
      hw/acpi: Provide stub version of acpi_ghes_record_errors()
      hw/acpi: Provide function acpi_ghes_present()
      target/arm: Use acpi_ghes_present() to see if we report ACPI memory errors
      docs/system/arm: Document which architecture extensions we emulate
      target/arm/translate-vfp.c: Whitespace fixes
      target/arm: Handle FPU being disabled in FPCXT_NS accesses
      target/arm: Don't NOCP fault for FPCXT_NS accesses
      target/arm: Handle writeback in VLDR/VSTR sysreg with no memory access
      target/arm: Factor FP context update code out into helper function
      target/arm: Split vfp_access_check() into A and M versions
      target/arm: Handle FPU check for FPCXT_NS insns via vfp_access_check_m()
      target/arm: Implement MVE VLDR/VSTR (non-widening forms)
      target/arm: Implement widening/narrowing MVE VLDR/VSTR insns
      target/arm: Implement MVE VCLZ
      target/arm: Implement MVE VCLS
      target/arm: Implement MVE VREV16, VREV32, VREV64
      target/arm: Implement MVE VMVN (register)
      target/arm: Implement MVE VABS
      target/arm: Implement MVE VNEG
      tcg: Make gen_dup_i32/i64() public as tcg_gen_dup_i32/i64
      target/arm: Implement MVE VDUP
      target/arm: Implement MVE VAND, VBIC, VORR, VORN, VEOR
      target/arm: Implement MVE VADD, VSUB, VMUL
      target/arm: Implement MVE VMULH
      target/arm: Implement MVE VRMULH
      target/arm: Implement MVE VMAX, VMIN
      target/arm: Implement MVE VABD
      target/arm: Implement MVE VHADD, VHSUB
      target/arm: Implement MVE VMULL
      target/arm: Implement MVE VMLALDAV
      target/arm: Implement MVE VMLSLDAV
      target/arm: Implement MVE VRMLALDAVH, VRMLSLDAVH
      target/arm: Implement MVE VADD (scalar)
      target/arm: Implement MVE VSUB, VMUL (scalar)
      target/arm: Implement MVE VHADD, VHSUB (scalar)
      target/arm: Implement MVE VBRSR
      target/arm: Implement MVE VPST
      target/arm: Implement MVE VQADD and VQSUB
      target/arm: Implement MVE VQDMULH and VQRDMULH (scalar)
      target/arm: Implement MVE VQDMULL scalar
      target/arm: Implement MVE VQDMULH, VQRDMULH (vector)
      target/arm: Implement MVE VQADD, VQSUB (vector)
      target/arm: Implement MVE VQSHL (vector)
      target/arm: Implement MVE VQRSHL
      target/arm: Implement MVE VSHL insn
      target/arm: Implement MVE VRSHL
      target/arm: Implement MVE VQDMLADH and VQRDMLADH
      target/arm: Implement MVE VQDMLSDH and VQRDMLSDH
      target/arm: Implement MVE VQDMULL (vector)
      target/arm: Implement MVE VRHADD
      target/arm: Implement MVE VADC, VSBC
      target/arm: Implement MVE VCADD
      target/arm: Implement MVE VHCADD
      target/arm: Implement MVE VADDV
      target/arm: Make VMOV scalar <-> gpreg beatwise for MVE

 docs/system/arm/emulation.rst |  103 ++++
 docs/system/arm/nrf.rst       |   51 ++
 docs/system/target-arm.rst    |    7 +
 include/hw/acpi/ghes.h        |    9 +
 include/tcg/tcg-op.h          |    8 +
 include/tcg/tcg.h             |    1 -
 target/arm/helper-mve.h       |  357 +++++++++++++
 target/arm/helper.h           |    2 +
 target/arm/internals.h        |   11 +
 target/arm/translate-a32.h    |    3 +
 target/arm/translate.h        |   10 +
 target/arm/m-nocp.decode      |   24 +
 target/arm/mve.decode         |  240 +++++++++
 target/arm/vfp.decode         |   14 -
 hw/acpi/ghes-stub.c           |   22 +
 hw/acpi/ghes.c                |   17 +
 target/arm/cpu64.c            |    2 +-
 target/arm/kvm64.c            |    6 +-
 target/arm/mte_helper.c       |   82 +--
 target/arm/mve_helper.c       | 1160 +++++++++++++++++++++++++++++++++++++++++
 target/arm/translate-m-nocp.c |  550 +++++++++++++++++++
 target/arm/translate-mve.c    |  759 +++++++++++++++++++++++++++
 target/arm/translate-vfp.c    |  741 +++++++-------------------
 tcg/tcg-op-gvec.c             |   20 +-
 MAINTAINERS                   |    1 +
 hw/acpi/meson.build           |    6 +-
 target/arm/meson.build        |    1 +
 27 files changed, 3578 insertions(+), 629 deletions(-)
 create mode 100644 docs/system/arm/emulation.rst
 create mode 100644 docs/system/arm/nrf.rst
 create mode 100644 target/arm/helper-mve.h
 create mode 100644 hw/acpi/ghes-stub.c
 create mode 100644 target/arm/mve_helper.c

Comments

no-reply@patchew.org June 21, 2021, 5:25 p.m. | #1
Patchew URL: https://patchew.org/QEMU/20210621162833.32535-1-peter.maydell@linaro.org/



Hi,

This series seems to have some coding style problems. See output below for
more information:

Type: series
Message-id: 20210621162833.32535-1-peter.maydell@linaro.org
Subject: [PULL 00/57] target-arm queue

=== TEST SCRIPT BEGIN ===
#!/bin/bash
git rev-parse base > /dev/null || exit 0
git config --local diff.renamelimit 0
git config --local diff.renames True
git config --local diff.algorithm histogram
./scripts/checkpatch.pl --mailback base..
=== TEST SCRIPT END ===

Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384
From https://github.com/patchew-project/qemu
 * [new tag]         patchew/20210621162833.32535-1-peter.maydell@linaro.org -> patchew/20210621162833.32535-1-peter.maydell@linaro.org
Switched to a new branch 'test'
d6d069f docs/system: arm: Add nRF boards description
b851e6b target/arm: Implement MTE3
fb75a9a target/arm: Make VMOV scalar <-> gpreg beatwise for MVE
172a6d4 target/arm: Implement MVE VADDV
acf229a target/arm: Implement MVE VHCADD
04091ff target/arm: Implement MVE VCADD
1deba18 target/arm: Implement MVE VADC, VSBC
68a141c target/arm: Implement MVE VRHADD
ee91105 target/arm: Implement MVE VQDMULL (vector)
9a0a95f target/arm: Implement MVE VQDMLSDH and VQRDMLSDH
b0346b1 target/arm: Implement MVE VQDMLADH and VQRDMLADH
8ecb102 target/arm: Implement MVE VRSHL
81f1f55 target/arm: Implement MVE VSHL insn
b818d12 target/arm: Implement MVE VQRSHL
19eba8b target/arm: Implement MVE VQSHL (vector)
c223aa6 target/arm: Implement MVE VQADD, VQSUB (vector)
0634d66 target/arm: Implement MVE VQDMULH, VQRDMULH (vector)
f2fbaa6 target/arm: Implement MVE VQDMULL scalar
59fe264 target/arm: Implement MVE VQDMULH and VQRDMULH (scalar)
90bc3ee target/arm: Implement MVE VQADD and VQSUB
bb1b4f6 target/arm: Implement MVE VPST
155d238 target/arm: Implement MVE VBRSR
9dca435 target/arm: Implement MVE VHADD, VHSUB (scalar)
397360a target/arm: Implement MVE VSUB, VMUL (scalar)
4607fad target/arm: Implement MVE VADD (scalar)
8b14f90 target/arm: Implement MVE VRMLALDAVH, VRMLSLDAVH
bc45e57 target/arm: Implement MVE VMLSLDAV
67721a3 target/arm: Implement MVE VMLALDAV
d3b9cb0 target/arm: Implement MVE VMULL
0022b57 target/arm: Implement MVE VHADD, VHSUB
76c9720 target/arm: Implement MVE VABD
a82597c target/arm: Implement MVE VMAX, VMIN
61fac1db target/arm: Implement MVE VRMULH
aafb1aa target/arm: Implement MVE VMULH
b67bdc8 target/arm: Implement MVE VADD, VSUB, VMUL
efc73d0 target/arm: Implement MVE VAND, VBIC, VORR, VORN, VEOR
30cabd5 target/arm: Implement MVE VDUP
1cfb396 tcg: Make gen_dup_i32/i64() public as tcg_gen_dup_i32/i64
f0579ce target/arm: Implement MVE VNEG
821be82 target/arm: Implement MVE VABS
2b148e0 target/arm: Implement MVE VMVN (register)
007f410 target/arm: Implement MVE VREV16, VREV32, VREV64
7d691ab target/arm: Implement MVE VCLS
56c40b0 target/arm: Implement MVE VCLZ
45436a4 target/arm: Implement widening/narrowing MVE VLDR/VSTR insns
a4905f1 target/arm: Implement MVE VLDR/VSTR (non-widening forms)
aaeca5e target/arm: Handle FPU check for FPCXT_NS insns via vfp_access_check_m()
0cb82be target/arm: Split vfp_access_check() into A and M versions
8eac39e target/arm: Factor FP context update code out into helper function
cec6284 target/arm: Handle writeback in VLDR/VSTR sysreg with no memory access
f4b5448 target/arm: Don't NOCP fault for FPCXT_NS accesses
fe3a80f target/arm: Handle FPU being disabled in FPCXT_NS accesses
6e64550 target/arm/translate-vfp.c: Whitespace fixes
167952d docs/system/arm: Document which architecture extensions we emulate
c59534f target/arm: Use acpi_ghes_present() to see if we report ACPI memory errors
263a5cc hw/acpi: Provide function acpi_ghes_present()
56b5aea hw/acpi: Provide stub version of acpi_ghes_record_errors()

=== OUTPUT BEGIN ===
1/57 Checking commit 56b5aea2f628 (hw/acpi: Provide stub version of acpi_ghes_record_errors())
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#24: 
new file mode 100644

total: 0 errors, 1 warnings, 33 lines checked

Patch 1/57 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
2/57 Checking commit 263a5cc8a35c (hw/acpi: Provide function acpi_ghes_present())
3/57 Checking commit c59534fe8316 (target/arm: Use acpi_ghes_present() to see if we report ACPI memory errors)
4/57 Checking commit 167952dc591a (docs/system/arm: Document which architecture extensions we emulate)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#24: 
new file mode 100644

total: 0 errors, 1 warnings, 114 lines checked

Patch 4/57 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
5/57 Checking commit 6e64550786b0 (target/arm/translate-vfp.c: Whitespace fixes)
6/57 Checking commit fe3a80fda9a6 (target/arm: Handle FPU being disabled in FPCXT_NS accesses)
7/57 Checking commit f4b5448ad938 (target/arm: Don't NOCP fault for FPCXT_NS accesses)
8/57 Checking commit cec628445a11 (target/arm: Handle writeback in VLDR/VSTR sysreg with no memory access)
9/57 Checking commit 8eac39e8a777 (target/arm: Factor FP context update code out into helper function)
10/57 Checking commit 0cb82bec21d6 (target/arm: Split vfp_access_check() into A and M versions)
11/57 Checking commit aaeca5e88495 (target/arm: Handle FPU check for FPCXT_NS insns via vfp_access_check_m())
12/57 Checking commit a4905f1d9249 (target/arm: Implement MVE VLDR/VSTR (non-widening forms))
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#31: 
new file mode 100644

WARNING: Block comments use a leading /* on a separate line
#271: FILE: target/arm/mve_helper.c:134:
+        /*                                                              \

total: 0 errors, 2 warnings, 370 lines checked

Patch 12/57 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
13/57 Checking commit 45436a4a9469 (target/arm: Implement widening/narrowing MVE VLDR/VSTR insns)
14/57 Checking commit 56c40b009263 (target/arm: Implement MVE VCLZ)
ERROR: spaces required around that '*' (ctx:WxO)
#131: FILE: target/arm/mve_helper.c:239:
+             uint8_t *: mergemask_ub,           \
                      ^

ERROR: spaces required around that ':' (ctx:OxW)
#131: FILE: target/arm/mve_helper.c:239:
+             uint8_t *: mergemask_ub,           \
                       ^

ERROR: spaces required around that '*' (ctx:WxO)
#132: FILE: target/arm/mve_helper.c:240:
+             int8_t *:  mergemask_sb,           \
                     ^

ERROR: spaces required around that ':' (ctx:OxW)
#132: FILE: target/arm/mve_helper.c:240:
+             int8_t *:  mergemask_sb,           \
                      ^

ERROR: spaces required around that '*' (ctx:WxO)
#133: FILE: target/arm/mve_helper.c:241:
+             uint16_t *: mergemask_uh,          \
                       ^

ERROR: spaces required around that ':' (ctx:OxW)
#133: FILE: target/arm/mve_helper.c:241:
+             uint16_t *: mergemask_uh,          \
                        ^

ERROR: spaces required around that '*' (ctx:WxO)
#134: FILE: target/arm/mve_helper.c:242:
+             int16_t *:  mergemask_sh,          \
                      ^

ERROR: spaces required around that ':' (ctx:OxW)
#134: FILE: target/arm/mve_helper.c:242:
+             int16_t *:  mergemask_sh,          \
                       ^

ERROR: spaces required around that '*' (ctx:WxO)
#135: FILE: target/arm/mve_helper.c:243:
+             uint32_t *: mergemask_uw,          \
                       ^

ERROR: spaces required around that ':' (ctx:OxW)
#135: FILE: target/arm/mve_helper.c:243:
+             uint32_t *: mergemask_uw,          \
                        ^

ERROR: spaces required around that '*' (ctx:WxO)
#136: FILE: target/arm/mve_helper.c:244:
+             int32_t *:  mergemask_sw,          \
                      ^

ERROR: spaces required around that ':' (ctx:OxW)
#136: FILE: target/arm/mve_helper.c:244:
+             int32_t *:  mergemask_sw,          \
                       ^

ERROR: spaces required around that '*' (ctx:WxO)
#137: FILE: target/arm/mve_helper.c:245:
+             uint64_t *: mergemask_uq,          \
                       ^

ERROR: spaces required around that ':' (ctx:OxW)
#137: FILE: target/arm/mve_helper.c:245:
+             uint64_t *: mergemask_uq,          \
                        ^

ERROR: spaces required around that '*' (ctx:WxO)
#138: FILE: target/arm/mve_helper.c:246:
+             int64_t *:  mergemask_sq)(D, R, M)
                      ^

ERROR: spaces required around that ':' (ctx:OxW)
#138: FILE: target/arm/mve_helper.c:246:
+             int64_t *:  mergemask_sq)(D, R, M)
                       ^

ERROR: spaces required around that '*' (ctx:WxV)
#175: FILE: target/arm/translate-mve.c:165:
+static bool do_1op(DisasContext *s, arg_1op *a, MVEGenOneOpFn fn)
                                             ^

ERROR: spaces required around that '*' (ctx:WxV)
#199: FILE: target/arm/translate-mve.c:189:
+    static bool trans_##INSN(DisasContext *s, arg_1op *a)       \
                                                       ^

total: 18 errors, 0 warnings, 163 lines checked

Patch 14/57 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

15/57 Checking commit 7d691ab598da (target/arm: Implement MVE VCLS)
16/57 Checking commit 007f4104854c (target/arm: Implement MVE VREV16, VREV32, VREV64)
ERROR: spaces required around that '*' (ctx:WxV)
#71: FILE: target/arm/translate-mve.c:203:
+static bool trans_VREV16(DisasContext *s, arg_1op *a)
                                                   ^

total: 1 errors, 0 warnings, 63 lines checked

Patch 16/57 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

17/57 Checking commit 2b148e00523c (target/arm: Implement MVE VMVN (register))
18/57 Checking commit 821be8239ae7 (target/arm: Implement MVE VABS)
19/57 Checking commit f0579ce25f36 (target/arm: Implement MVE VNEG)
20/57 Checking commit 1cfb396817a8 (tcg: Make gen_dup_i32/i64() public as tcg_gen_dup_i32/i64)
21/57 Checking commit 30cabd5c6d84 (target/arm: Implement MVE VDUP)
ERROR: spaces required around that '*' (ctx:WxV)
#95: FILE: target/arm/translate-mve.c:165:
+static bool trans_VDUP(DisasContext *s, arg_VDUP *a)
                                                  ^

total: 1 errors, 0 warnings, 82 lines checked

Patch 21/57 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

22/57 Checking commit efc73d030f8f (target/arm: Implement MVE VAND, VBIC, VORR, VORN, VEOR)
23/57 Checking commit b67bdc8435a9 (target/arm: Implement MVE VADD, VSUB, VMUL)
24/57 Checking commit aafb1aab43bc (target/arm: Implement MVE VMULH)
25/57 Checking commit 61fac1db787f (target/arm: Implement MVE VRMULH)
26/57 Checking commit a82597c398c2 (target/arm: Implement MVE VMAX, VMIN)
27/57 Checking commit 76c97201313d (target/arm: Implement MVE VABD)
28/57 Checking commit 0022b5773dfc (target/arm: Implement MVE VHADD, VHSUB)
29/57 Checking commit d3b9cb05244a (target/arm: Implement MVE VMULL)
WARNING: line over 80 characters
#73: FILE: target/arm/mve_helper.c:358:
+    void HELPER(glue(mve_, OP))(CPUARMState *env, void *vd, void *vn, void *vm) \

total: 0 errors, 1 warnings, 81 lines checked

Patch 29/57 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
30/57 Checking commit 67721a32e82d (target/arm: Implement MVE VMLALDAV)
ERROR: spaces required around that '+=' (ctx:WxB)
#97: FILE: target/arm/mve_helper.c:518:
+DO_LDAV(vmlaldavsh, 2, int16_t, false, +=, +=)
                                            ^

ERROR: spaces required around that '+=' (ctx:WxB)
#98: FILE: target/arm/mve_helper.c:519:
+DO_LDAV(vmlaldavxsh, 2, int16_t, true, +=, +=)
                                            ^

ERROR: spaces required around that '+=' (ctx:WxB)
#99: FILE: target/arm/mve_helper.c:520:
+DO_LDAV(vmlaldavsw, 4, int32_t, false, +=, +=)
                                            ^

ERROR: spaces required around that '+=' (ctx:WxB)
#100: FILE: target/arm/mve_helper.c:521:
+DO_LDAV(vmlaldavxsw, 4, int32_t, true, +=, +=)
                                            ^

ERROR: spaces required around that '+=' (ctx:WxB)
#102: FILE: target/arm/mve_helper.c:523:
+DO_LDAV(vmlaldavuh, 2, uint16_t, false, +=, +=)
                                             ^

ERROR: spaces required around that '+=' (ctx:WxB)
#103: FILE: target/arm/mve_helper.c:524:
+DO_LDAV(vmlaldavuw, 4, uint32_t, false, +=, +=)
                                             ^

WARNING: line over 80 characters
#112: FILE: target/arm/translate-mve.c:34:
+typedef void MVEGenDualAccOpFn(TCGv_i64, TCGv_ptr, TCGv_ptr, TCGv_ptr, TCGv_i64);

ERROR: spaces required around that '*' (ctx:WxV)
#144: FILE: target/arm/translate-mve.c:386:
+static bool do_long_dual_acc(DisasContext *s, arg_vmlaldav *a,
                                                            ^

total: 7 errors, 1 warnings, 199 lines checked

Patch 30/57 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

31/57 Checking commit bc45e575e541 (target/arm: Implement MVE VMLSLDAV)
ERROR: spaces required around that '-=' (ctx:WxB)
#54: FILE: target/arm/mve_helper.c:526:
+DO_LDAV(vmlsldavsh, 2, int16_t, false, +=, -=)
                                            ^

ERROR: spaces required around that '-=' (ctx:WxB)
#55: FILE: target/arm/mve_helper.c:527:
+DO_LDAV(vmlsldavxsh, 2, int16_t, true, +=, -=)
                                            ^

ERROR: spaces required around that '-=' (ctx:WxB)
#56: FILE: target/arm/mve_helper.c:528:
+DO_LDAV(vmlsldavsw, 4, int32_t, false, +=, -=)
                                            ^

ERROR: spaces required around that '-=' (ctx:WxB)
#57: FILE: target/arm/mve_helper.c:529:
+DO_LDAV(vmlsldavxsw, 4, int32_t, true, +=, -=)
                                            ^

total: 4 errors, 0 warnings, 35 lines checked

Patch 31/57 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

32/57 Checking commit 8b14f900b0e9 (target/arm: Implement MVE VRMLALDAVH, VRMLSLDAVH)
WARNING: line over 80 characters
#103: FILE: target/arm/mve_helper.c:560:
+DO_LDAVH(vrmlaldavhsw, 4, int32_t, false, int128_add, int128_add, int128_makes64)

WARNING: line over 80 characters
#104: FILE: target/arm/mve_helper.c:561:
+DO_LDAVH(vrmlaldavhxsw, 4, int32_t, true, int128_add, int128_add, int128_makes64)

WARNING: line over 80 characters
#106: FILE: target/arm/mve_helper.c:563:
+DO_LDAVH(vrmlaldavhuw, 4, uint32_t, false, int128_add, int128_add, int128_make64)

WARNING: line over 80 characters
#108: FILE: target/arm/mve_helper.c:565:
+DO_LDAVH(vrmlsldavhsw, 4, int32_t, false, int128_add, int128_sub, int128_makes64)

WARNING: line over 80 characters
#109: FILE: target/arm/mve_helper.c:566:
+DO_LDAVH(vrmlsldavhxsw, 4, int32_t, true, int128_add, int128_sub, int128_makes64)

total: 0 errors, 5 warnings, 98 lines checked

Patch 32/57 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
33/57 Checking commit 4607fad1122c (target/arm: Implement MVE VADD (scalar))
ERROR: spaces required around that '*' (ctx:WxV)
#114: FILE: target/arm/translate-mve.c:387:
+static bool do_2op_scalar(DisasContext *s, arg_2scalar *a,
                                                        ^

ERROR: spaces required around that '*' (ctx:WxV)
#145: FILE: target/arm/translate-mve.c:418:
+    static bool trans_##INSN(DisasContext *s, arg_2scalar *a)   \
                                                           ^

total: 2 errors, 0 warnings, 117 lines checked

Patch 33/57 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

34/57 Checking commit 397360ae0b3d (target/arm: Implement MVE VSUB, VMUL (scalar))
35/57 Checking commit 9dca435c65a1 (target/arm: Implement MVE VHADD, VHSUB (scalar))
36/57 Checking commit 155d238ce9bb (target/arm: Implement MVE VBRSR)
37/57 Checking commit bb1b4f61f72e (target/arm: Implement MVE VPST)
38/57 Checking commit 90bc3ee6a750 (target/arm: Implement MVE VQADD and VQSUB)
39/57 Checking commit 59fe2644d3f7 (target/arm: Implement MVE VQDMULH and VQRDMULH (scalar))
WARNING: line over 80 characters
#30: FILE: target/arm/helper-mve.h:192:
+DEF_HELPER_FLAGS_4(mve_vqdmulh_scalarb, TCG_CALL_NO_WG, void, env, ptr, ptr, i32)

WARNING: line over 80 characters
#31: FILE: target/arm/helper-mve.h:193:
+DEF_HELPER_FLAGS_4(mve_vqdmulh_scalarh, TCG_CALL_NO_WG, void, env, ptr, ptr, i32)

WARNING: line over 80 characters
#32: FILE: target/arm/helper-mve.h:194:
+DEF_HELPER_FLAGS_4(mve_vqdmulh_scalarw, TCG_CALL_NO_WG, void, env, ptr, ptr, i32)

WARNING: line over 80 characters
#34: FILE: target/arm/helper-mve.h:196:
+DEF_HELPER_FLAGS_4(mve_vqrdmulh_scalarb, TCG_CALL_NO_WG, void, env, ptr, ptr, i32)

WARNING: line over 80 characters
#35: FILE: target/arm/helper-mve.h:197:
+DEF_HELPER_FLAGS_4(mve_vqrdmulh_scalarh, TCG_CALL_NO_WG, void, env, ptr, ptr, i32)

WARNING: line over 80 characters
#36: FILE: target/arm/helper-mve.h:198:
+DEF_HELPER_FLAGS_4(mve_vqrdmulh_scalarw, TCG_CALL_NO_WG, void, env, ptr, ptr, i32)

total: 0 errors, 6 warnings, 68 lines checked

Patch 39/57 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
40/57 Checking commit f2fbaa6e7982 (target/arm: Implement MVE VQDMULL scalar)
WARNING: line over 80 characters
#33: FILE: target/arm/helper-mve.h:204:
+DEF_HELPER_FLAGS_4(mve_vqdmullb_scalarh, TCG_CALL_NO_WG, void, env, ptr, ptr, i32)

WARNING: line over 80 characters
#34: FILE: target/arm/helper-mve.h:205:
+DEF_HELPER_FLAGS_4(mve_vqdmullb_scalarw, TCG_CALL_NO_WG, void, env, ptr, ptr, i32)

WARNING: line over 80 characters
#35: FILE: target/arm/helper-mve.h:206:
+DEF_HELPER_FLAGS_4(mve_vqdmullt_scalarh, TCG_CALL_NO_WG, void, env, ptr, ptr, i32)

WARNING: line over 80 characters
#36: FILE: target/arm/helper-mve.h:207:
+DEF_HELPER_FLAGS_4(mve_vqdmullt_scalarw, TCG_CALL_NO_WG, void, env, ptr, ptr, i32)

ERROR: spaces required around that '*' (ctx:WxV)
#178: FILE: target/arm/translate-mve.c:457:
+static bool trans_VQDMULLB_scalar(DisasContext *s, arg_2scalar *a)
                                                                ^

total: 1 errors, 4 warnings, 164 lines checked

Patch 40/57 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

41/57 Checking commit 0634d66bafe4 (target/arm: Implement MVE VQDMULH, VQRDMULH (vector))
WARNING: line over 80 characters
#62: FILE: target/arm/mve_helper.c:374:
+    void HELPER(glue(mve_, OP))(CPUARMState *env, void *vd, void *vn, void *vm) \

total: 0 errors, 1 warnings, 70 lines checked

Patch 41/57 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
42/57 Checking commit c223aa68aeb4 (target/arm: Implement MVE VQADD, VQSUB (vector))
43/57 Checking commit 19eba8b6adbe (target/arm: Implement MVE VQSHL (vector))
44/57 Checking commit b818d1299bad (target/arm: Implement MVE VQRSHL)
45/57 Checking commit 81f1f5559ff6 (target/arm: Implement MVE VSHL insn)
46/57 Checking commit 8ecb102ef816 (target/arm: Implement MVE VRSHL)
47/57 Checking commit b0346b1b6a9e (target/arm: Implement MVE VQDMLADH and VQRDMLADH)
48/57 Checking commit 9a0a95f02f72 (target/arm: Implement MVE VQDMLSDH and VQRDMLSDH)
49/57 Checking commit ee91105c2cf6 (target/arm: Implement MVE VQDMULL (vector))
50/57 Checking commit 68a141ccf636 (target/arm: Implement MVE VRHADD)
51/57 Checking commit 1deba1817809 (target/arm: Implement MVE VADC, VSBC)
52/57 Checking commit 04091ffd1d78 (target/arm: Implement MVE VCADD)
WARNING: line over 80 characters
#75: FILE: target/arm/mve_helper.c:593:
+    void HELPER(glue(mve_, OP))(CPUARMState *env, void *vd, void *vn, void *vm) \

WARNING: Block comments use a leading /* on a separate line
#81: FILE: target/arm/mve_helper.c:599:
+        /* Calculate all results first to avoid overwriting inputs */   \

total: 0 errors, 2 warnings, 78 lines checked

Patch 52/57 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
53/57 Checking commit acf229a94d31 (target/arm: Implement MVE VHCADD)
54/57 Checking commit 172a6d430617 (target/arm: Implement MVE VADDV)
55/57 Checking commit fb75a9aa0fdf (target/arm: Make VMOV scalar <-> gpreg beatwise for MVE)
56/57 Checking commit b851e6b674ed (target/arm: Implement MTE3)
57/57 Checking commit d6d069fa6477 (docs/system: arm: Add nRF boards description)
=== OUTPUT END ===

Test command exited with code: 1


The full log is available at
http://patchew.org/logs/20210621162833.32535-1-peter.maydell@linaro.org/testing.checkpatch/?type=message.
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