From patchwork Mon Jul 12 19:44:17 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Prabhakar Mahadev Lad X-Patchwork-Id: 473236 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, MENTIONS_GIT_HOSTING,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id CBD4EC07E9A for ; Mon, 12 Jul 2021 19:44:36 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id B917A60698 for ; Mon, 12 Jul 2021 19:44:36 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235784AbhGLTrY (ORCPT ); Mon, 12 Jul 2021 15:47:24 -0400 Received: from relmlor2.renesas.com ([210.160.252.172]:61964 "EHLO relmlie6.idc.renesas.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S230199AbhGLTrX (ORCPT ); Mon, 12 Jul 2021 15:47:23 -0400 X-IronPort-AV: E=Sophos;i="5.84,234,1620658800"; d="scan'208";a="87354838" Received: from unknown (HELO relmlir6.idc.renesas.com) ([10.200.68.152]) by relmlie6.idc.renesas.com with ESMTP; 13 Jul 2021 04:44:33 +0900 Received: from localhost.localdomain (unknown [10.226.36.204]) by relmlir6.idc.renesas.com (Postfix) with ESMTP id 5FE5840E011B; Tue, 13 Jul 2021 04:44:30 +0900 (JST) From: Lad Prabhakar To: Geert Uytterhoeven , Rob Herring , Linus Walleij , Magnus Damm , Michael Turquette , Stephen Boyd Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, linux-gpio@vger.kernel.org, Prabhakar , Biju Das , Lad Prabhakar Subject: [PATCH v2 0/5] pin and gpio controller driver for Renesas RZ/G2L Date: Mon, 12 Jul 2021 20:44:17 +0100 Message-Id: <20210712194422.12405-1-prabhakar.mahadev-lad.rj@bp.renesas.com> X-Mailer: git-send-email 2.17.1 Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Hi All, This patch series adds pin and gpio controller driver for Renesas RZ/G2L SoC. RZ/G2L has a simple pin and GPIO controller combined similar to RZ/A2. This patch series applies on top of https://git.kernel.org/pub/scm/linux/ kernel/git/geert/renesas-drivers.git/log/?h=topic/rzg2l-update-clock-defs-v4 Cheers, Prabhakar Changes for v2: * Added support for per pin pinmux support * Added support for pins to set configs * Dropped pfc-r9a07g044.c/h * Fixed review comments pointed by Geert * Included clock/reset changes * Included DTS/I changes Lad Prabhakar (5): dt-bindings: pinctrl: renesas,rzg2l-pinctrl: Add DT bindings for RZ/G2L pinctrl pinctrl: renesas: Add RZ/G2L pin and gpio controller driver drivers: clk: renesas: r9a07g044-cpg: Add GPIO clock and reset entries arm64: dts: renesas: r9a07g044: Add pinctrl node arm64: dts: renesas: rzg2l-smarc: Add scif0 pins .../pinctrl/renesas,rzg2l-pinctrl.yaml | 155 +++ arch/arm64/boot/dts/renesas/r9a07g044.dtsi | 13 + arch/arm64/boot/dts/renesas/rzg2l-smarc.dtsi | 10 + drivers/clk/renesas/r9a07g044-cpg.c | 5 + drivers/pinctrl/renesas/Kconfig | 11 + drivers/pinctrl/renesas/Makefile | 1 + drivers/pinctrl/renesas/pinctrl-rzg2l.c | 1196 +++++++++++++++++ include/dt-bindings/pinctrl/rzg2l-pinctrl.h | 23 + 8 files changed, 1414 insertions(+) create mode 100644 Documentation/devicetree/bindings/pinctrl/renesas,rzg2l-pinctrl.yaml create mode 100644 drivers/pinctrl/renesas/pinctrl-rzg2l.c create mode 100644 include/dt-bindings/pinctrl/rzg2l-pinctrl.h base-commit: 06c1e6911a7a76b446e4b00fc8bad5d8465932f8 Reviewed-by: Geert Uytterhoeven Reviewed-by: Geert Uytterhoeven