From patchwork Wed Mar 1 18:22:33 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Georgi Djakov X-Patchwork-Id: 94733 Delivered-To: patch@linaro.org Received: by 10.140.20.113 with SMTP id 104csp1932221qgi; Wed, 1 Mar 2017 10:24:33 -0800 (PST) X-Received: by 10.99.8.4 with SMTP id 4mr10238398pgi.204.1488392673536; Wed, 01 Mar 2017 10:24:33 -0800 (PST) Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id j17si5239452pgh.264.2017.03.01.10.24.33; Wed, 01 Mar 2017 10:24:33 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-arm-msm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org; spf=pass (google.com: best guess record for domain of linux-arm-msm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753246AbdCASYF (ORCPT + 9 others); Wed, 1 Mar 2017 13:24:05 -0500 Received: from mail-wr0-f178.google.com ([209.85.128.178]:36269 "EHLO mail-wr0-f178.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752101AbdCASXE (ORCPT ); Wed, 1 Mar 2017 13:23:04 -0500 Received: by mail-wr0-f178.google.com with SMTP id u108so36178936wrb.3 for ; Wed, 01 Mar 2017 10:22:39 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id; bh=lFPqbDhcSugAIMkjNuE76zHx2zGX2NlS8aZoUJiSB7Y=; b=KUvGVBK61oH2ze4L6xAELe2Cw1wWn5HiLAQBFyNGsrg6wu5WGYU+5MmbzBrpwrMRAr 0+SuCKkXZIuuIjpKnQvNAGtbdKrgRn64L+jx4iqevC1QS+A/DlpB0wdapTun4I8ABDWk oVe5r6PIC6ZgPiga36e1yYk4gkwgk/y+zO3HM= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=lFPqbDhcSugAIMkjNuE76zHx2zGX2NlS8aZoUJiSB7Y=; b=QShNjEbARtNnmGurjMMqpvjwZkGgUUj+64f0ZWaLU9YqxfCe/SNwXRDq8f+yX/Wt0/ spnkYGZP7IbtcUbIuG8eX0v8EEVLPdyEn82NVgl7k39xKBP3InWCvgBx3Sw5bmIAcEQg zCTCoWJpTkxSmHl0sUsbGJd0DBAa8lSlC3OnsxOju5w1kYnK5yhHZmnn5NIjXd4rWAVV kfeVEUPKoN6lTKCZFOJ4eYC12jerUXgsWdtvDm3DulO2PR4QEKOtbGKljsC+FN0m8VZ2 O3sQFBeqeS6w7gRVDu4vhtG6sGGwDNKO4iMQEtWVTlKAa7EPu0d67NN8reRdUKG3YaOO rQHQ== X-Gm-Message-State: AMke39nc9MNY+Ab6VH1QVV+1uMPkPBiGbOxYRYF8/R/cP7j8ZPzt55hYgHHiciHCK9t7ivXm X-Received: by 10.223.139.12 with SMTP id n12mr8454168wra.176.1488392558537; Wed, 01 Mar 2017 10:22:38 -0800 (PST) Received: from mms-0441.wifi.mm-sol.com ([212.45.67.2]) by smtp.googlemail.com with ESMTPSA id m29sm7613389wrm.38.2017.03.01.10.22.36 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 01 Mar 2017 10:22:37 -0800 (PST) From: Georgi Djakov To: linux-pm@vger.kernel.org, rjw@rjwysocki.net, robh+dt@kernel.org Cc: gregkh@linuxfoundation.org, khilman@baylibre.com, mturquette@baylibre.com, vincent.guittot@linaro.org, skannan@codeaurora.org, sboyd@codeaurora.org, andy.gross@linaro.org, seansw@qti.qualcomm.com, davidai@quicinc.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, georgi.djakov@linaro.org Subject: [RFC v0 0/2] Introduce on-chip interconnect API Date: Wed, 1 Mar 2017 20:22:33 +0200 Message-Id: <20170301182235.19154-1-georgi.djakov@linaro.org> X-Mailer: git-send-email 2.11.0 Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Modern SoCs have multiple processors and various dedicated cores (video, gpu, graphics, modem). These cores are talking to each other and can generate a lot of data flowing through the on-chip interconnects. These interconnect buses could form different topologies such as crossbar, point to point buses, hierarchical buses or use the network-on-chip concept. These buses have been sized usually to handle use cases with high data throughput but it is not necessary all the time and consume a lot of power. Furthermore, the priority between masters can vary depending on the running use case like video playback or cpu intensive tasks. Having an API to control the requirement of the system in term of bandwidth and QoS, so we can adapt the interconnect configuration to match those by scaling the frequencies, setting link priority and tuning QoS parameters. This configuration can be a static, one-time operation done at boot for some platforms or a dynamic set of operations that happen at run-time. This patchset introduce a new API to get the requirement and configure the interconnect buses across the entire chipset to fit with the current demand. The API is NOT for changing the performance of the endpoint devices, but only the interconnect path in between them. The API is using a consumer/provider-based model, where the providers are the interconnect controllers and the consumers could be various drivers. The consumers request interconnect resources (path) to an endpoint and set the desired constraints on this data flow path. The provider(s) receive requests from consumers and aggregate these requests for all master-slave pairs on that path. Then the providers configure each participating in the topology node according to the requested data flow path, physical links and constraints. The topology could be complicated and multi-tiered and is SoC specific. Below is a simplified diagram of a real-world SoC topology. The interconnect providers are the memory front-end and the NoCs. +----------------+ +----------------+ | HW Accelerator |--->| M NoC |<---------------+ +----------------+ +----------------+ | | | +------------+ +-------------+ V +------+ | | | +--------+ | PCIe | | | | | Slaves | +------+ | | | +--------+ | | C NoC | V V | | +------------------+ +------------------------+ | | +-----+ | |-->| |-->| |-->| CPU | | |-->| |<--| | +-----+ | Memory | | S NoC | +------------+ | |<--| |---------+ | | |<--| |<------+ | | +--------+ +------------------+ +------------------------+ | | +-->| Slaves | ^ ^ ^ ^ | | +--------+ | | | | | V +-----+ | +-----+ +-----+ +---------+ +----------------+ +--------+ | CPU | | | GPU | | DSP | | Masters |-->| P NoC |-->| Slaves | +-----+ | +-----+ +-----+ +---------+ +----------------+ +--------+ | +-------+ | Modem | +-------+ This RFC does not implement all features but only main skeleton to check the validity of the proposal. Currently it only works with device-tree and platform devices. TODO: * Constraints are currently stored in internal data structure. Should PM QoS be used instead? * Rework the framework to not depend on DT as frameworks cannot be tied directly to firmware interfaces. Add support for ACPI? * Currently the interconnect_set() use one bandwidth integer value as parameter but this might be extended to support a list of parameters and other QoS values. * Add support for more than one endpoint per consumer. * Cache the path between the nodes instead of walking the graph on each get(). * Sync interconnect requests with the idle state of the device. * Use integers for interconnect ids instead of strings. Summary of the patches: Patch 1 introduces the interconnect API. Patch 2 creates the first vendor specific interconnect controller driver. Georgi Djakov (2): interconnect: Add generic interconnect controller API interconnect: Add Qualcomm msm8916 interconnect provider driver .../bindings/interconnect/interconnect.txt | 91 ++++ Documentation/interconnect/interconnect.txt | 68 +++ drivers/Kconfig | 2 + drivers/Makefile | 1 + drivers/interconnect/Kconfig | 11 + drivers/interconnect/Makefile | 3 + drivers/interconnect/interconnect.c | 285 +++++++++++++ drivers/interconnect/qcom/Kconfig | 11 + drivers/interconnect/qcom/Makefile | 2 + drivers/interconnect/qcom/interconnect_msm8916.c | 473 +++++++++++++++++++++ include/dt-bindings/interconnect/qcom,msm8916.h | 87 ++++ include/linux/interconnect-consumer.h | 70 +++ include/linux/interconnect-provider.h | 92 ++++ 13 files changed, 1196 insertions(+) create mode 100644 Documentation/devicetree/bindings/interconnect/interconnect.txt create mode 100644 Documentation/interconnect/interconnect.txt create mode 100644 drivers/interconnect/Kconfig create mode 100644 drivers/interconnect/Makefile create mode 100644 drivers/interconnect/interconnect.c create mode 100644 drivers/interconnect/qcom/Kconfig create mode 100644 drivers/interconnect/qcom/Makefile create mode 100644 drivers/interconnect/qcom/interconnect_msm8916.c create mode 100644 include/dt-bindings/interconnect/qcom,msm8916.h create mode 100644 include/linux/interconnect-consumer.h create mode 100644 include/linux/interconnect-provider.h -- To unsubscribe from this list: send the line "unsubscribe linux-arm-msm" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html