| Message ID | 20170613161323.25196-6-julien.grall@arm.com |
|---|---|
| State | Accepted |
| Commit | ed67177ac2cfca9645f136b148f15e98ac57035b |
| Headers | show |
| Series | xen/arm: Extend the usage of typesafe MFN | expand |
On Tue, 13 Jun 2017, Julien Grall wrote: > The file mm.c is the only user of mfn_to_xen_entry. This will also help > to use the typesafe MFN. > > Signed-off-by: Julien Grall <julien.grall@arm.com> Reviewed-by: Stefano Stabellini <sstabellini@kernel.org> > --- > xen/arch/arm/mm.c | 65 ++++++++++++++++++++++++++++++++++++++++++++++ > xen/include/asm-arm/page.h | 65 ---------------------------------------------- > 2 files changed, 65 insertions(+), 65 deletions(-) > > diff --git a/xen/arch/arm/mm.c b/xen/arch/arm/mm.c > index b4ff777b55..587a6b3975 100644 > --- a/xen/arch/arm/mm.c > +++ b/xen/arch/arm/mm.c > @@ -254,6 +254,71 @@ void dump_hyp_walk(vaddr_t addr) > dump_pt_walk(ttbr, addr, HYP_PT_ROOT_LEVEL, 1); > } > > +/* Standard entry type that we'll use to build Xen's own pagetables. > + * We put the same permissions at every level, because they're ignored > + * by the walker in non-leaf entries. */ > +static inline lpae_t mfn_to_xen_entry(unsigned long mfn, unsigned attr) > +{ > + paddr_t pa = ((paddr_t) mfn) << PAGE_SHIFT; > + lpae_t e = (lpae_t) { > + .pt = { > + .valid = 1, /* Mappings are present */ > + .table = 0, /* Set to 1 for links and 4k maps */ > + .ai = attr, > + .ns = 1, /* Hyp mode is in the non-secure world */ > + .user = 1, /* See below */ > + .ro = 0, /* Assume read-write */ > + .af = 1, /* No need for access tracking */ > + .ng = 1, /* Makes TLB flushes easier */ > + .contig = 0, /* Assume non-contiguous */ > + .xn = 1, /* No need to execute outside .text */ > + .avail = 0, /* Reference count for domheap mapping */ > + }};; > + /* Setting the User bit is strange, but the ATS1H[RW] instructions > + * don't seem to work otherwise, and since we never run on Xen > + * pagetables in User mode it's OK. If this changes, remember > + * to update the hard-coded values in head.S too */ > + > + switch ( attr ) > + { > + case BUFFERABLE: > + /* > + * ARM ARM: Overlaying the shareability attribute (DDI > + * 0406C.b B3-1376 to 1377) > + * > + * A memory region with a resultant memory type attribute of Normal, > + * and a resultant cacheability attribute of Inner Non-cacheable, > + * Outer Non-cacheable, must have a resultant shareability attribute > + * of Outer Shareable, otherwise shareability is UNPREDICTABLE. > + * > + * On ARMv8 sharability is ignored and explicitly treated as Outer > + * Shareable for Normal Inner Non_cacheable, Outer Non-cacheable. > + */ > + e.pt.sh = LPAE_SH_OUTER; > + break; > + case UNCACHED: > + case DEV_SHARED: > + /* Shareability is ignored for non-Normal memory, Outer is as > + * good as anything. > + * > + * On ARMv8 sharability is ignored and explicitly treated as Outer > + * Shareable for any device memory type. > + */ > + e.pt.sh = LPAE_SH_OUTER; > + break; > + default: > + e.pt.sh = LPAE_SH_INNER; /* Xen mappings are SMP coherent */ > + break; > + } > + > + ASSERT(!(pa & ~PAGE_MASK)); > + ASSERT(!(pa & ~PADDR_MASK)); > + > + // XXX shifts > + e.bits |= pa; > + return e; > +} > + > /* Map a 4k page in a fixmap entry */ > void set_fixmap(unsigned map, unsigned long mfn, unsigned attributes) > { > diff --git a/xen/include/asm-arm/page.h b/xen/include/asm-arm/page.h > index 497b4c86ad..3670ab665d 100644 > --- a/xen/include/asm-arm/page.h > +++ b/xen/include/asm-arm/page.h > @@ -205,71 +205,6 @@ typedef union { > lpae_walk_t walk; > } lpae_t; > > -/* Standard entry type that we'll use to build Xen's own pagetables. > - * We put the same permissions at every level, because they're ignored > - * by the walker in non-leaf entries. */ > -static inline lpae_t mfn_to_xen_entry(unsigned long mfn, unsigned attr) > -{ > - paddr_t pa = ((paddr_t) mfn) << PAGE_SHIFT; > - lpae_t e = (lpae_t) { > - .pt = { > - .valid = 1, /* Mappings are present */ > - .table = 0, /* Set to 1 for links and 4k maps */ > - .ai = attr, > - .ns = 1, /* Hyp mode is in the non-secure world */ > - .user = 1, /* See below */ > - .ro = 0, /* Assume read-write */ > - .af = 1, /* No need for access tracking */ > - .ng = 1, /* Makes TLB flushes easier */ > - .contig = 0, /* Assume non-contiguous */ > - .xn = 1, /* No need to execute outside .text */ > - .avail = 0, /* Reference count for domheap mapping */ > - }};; > - /* Setting the User bit is strange, but the ATS1H[RW] instructions > - * don't seem to work otherwise, and since we never run on Xen > - * pagetables in User mode it's OK. If this changes, remember > - * to update the hard-coded values in head.S too */ > - > - switch ( attr ) > - { > - case BUFFERABLE: > - /* > - * ARM ARM: Overlaying the shareability attribute (DDI > - * 0406C.b B3-1376 to 1377) > - * > - * A memory region with a resultant memory type attribute of Normal, > - * and a resultant cacheability attribute of Inner Non-cacheable, > - * Outer Non-cacheable, must have a resultant shareability attribute > - * of Outer Shareable, otherwise shareability is UNPREDICTABLE. > - * > - * On ARMv8 sharability is ignored and explicitly treated as Outer > - * Shareable for Normal Inner Non_cacheable, Outer Non-cacheable. > - */ > - e.pt.sh = LPAE_SH_OUTER; > - break; > - case UNCACHED: > - case DEV_SHARED: > - /* Shareability is ignored for non-Normal memory, Outer is as > - * good as anything. > - * > - * On ARMv8 sharability is ignored and explicitly treated as Outer > - * Shareable for any device memory type. > - */ > - e.pt.sh = LPAE_SH_OUTER; > - break; > - default: > - e.pt.sh = LPAE_SH_INNER; /* Xen mappings are SMP coherent */ > - break; > - } > - > - ASSERT(!(pa & ~PAGE_MASK)); > - ASSERT(!(pa & ~PADDR_MASK)); > - > - // XXX shifts > - e.bits |= pa; > - return e; > -} > - > #if defined(CONFIG_ARM_32) > # include <asm/arm32/page.h> > #elif defined(CONFIG_ARM_64) > -- > 2.11.0 >
diff --git a/xen/arch/arm/mm.c b/xen/arch/arm/mm.c index b4ff777b55..587a6b3975 100644 --- a/xen/arch/arm/mm.c +++ b/xen/arch/arm/mm.c @@ -254,6 +254,71 @@ void dump_hyp_walk(vaddr_t addr) dump_pt_walk(ttbr, addr, HYP_PT_ROOT_LEVEL, 1); } +/* Standard entry type that we'll use to build Xen's own pagetables. + * We put the same permissions at every level, because they're ignored + * by the walker in non-leaf entries. */ +static inline lpae_t mfn_to_xen_entry(unsigned long mfn, unsigned attr) +{ + paddr_t pa = ((paddr_t) mfn) << PAGE_SHIFT; + lpae_t e = (lpae_t) { + .pt = { + .valid = 1, /* Mappings are present */ + .table = 0, /* Set to 1 for links and 4k maps */ + .ai = attr, + .ns = 1, /* Hyp mode is in the non-secure world */ + .user = 1, /* See below */ + .ro = 0, /* Assume read-write */ + .af = 1, /* No need for access tracking */ + .ng = 1, /* Makes TLB flushes easier */ + .contig = 0, /* Assume non-contiguous */ + .xn = 1, /* No need to execute outside .text */ + .avail = 0, /* Reference count for domheap mapping */ + }};; + /* Setting the User bit is strange, but the ATS1H[RW] instructions + * don't seem to work otherwise, and since we never run on Xen + * pagetables in User mode it's OK. If this changes, remember + * to update the hard-coded values in head.S too */ + + switch ( attr ) + { + case BUFFERABLE: + /* + * ARM ARM: Overlaying the shareability attribute (DDI + * 0406C.b B3-1376 to 1377) + * + * A memory region with a resultant memory type attribute of Normal, + * and a resultant cacheability attribute of Inner Non-cacheable, + * Outer Non-cacheable, must have a resultant shareability attribute + * of Outer Shareable, otherwise shareability is UNPREDICTABLE. + * + * On ARMv8 sharability is ignored and explicitly treated as Outer + * Shareable for Normal Inner Non_cacheable, Outer Non-cacheable. + */ + e.pt.sh = LPAE_SH_OUTER; + break; + case UNCACHED: + case DEV_SHARED: + /* Shareability is ignored for non-Normal memory, Outer is as + * good as anything. + * + * On ARMv8 sharability is ignored and explicitly treated as Outer + * Shareable for any device memory type. + */ + e.pt.sh = LPAE_SH_OUTER; + break; + default: + e.pt.sh = LPAE_SH_INNER; /* Xen mappings are SMP coherent */ + break; + } + + ASSERT(!(pa & ~PAGE_MASK)); + ASSERT(!(pa & ~PADDR_MASK)); + + // XXX shifts + e.bits |= pa; + return e; +} + /* Map a 4k page in a fixmap entry */ void set_fixmap(unsigned map, unsigned long mfn, unsigned attributes) { diff --git a/xen/include/asm-arm/page.h b/xen/include/asm-arm/page.h index 497b4c86ad..3670ab665d 100644 --- a/xen/include/asm-arm/page.h +++ b/xen/include/asm-arm/page.h @@ -205,71 +205,6 @@ typedef union { lpae_walk_t walk; } lpae_t; -/* Standard entry type that we'll use to build Xen's own pagetables. - * We put the same permissions at every level, because they're ignored - * by the walker in non-leaf entries. */ -static inline lpae_t mfn_to_xen_entry(unsigned long mfn, unsigned attr) -{ - paddr_t pa = ((paddr_t) mfn) << PAGE_SHIFT; - lpae_t e = (lpae_t) { - .pt = { - .valid = 1, /* Mappings are present */ - .table = 0, /* Set to 1 for links and 4k maps */ - .ai = attr, - .ns = 1, /* Hyp mode is in the non-secure world */ - .user = 1, /* See below */ - .ro = 0, /* Assume read-write */ - .af = 1, /* No need for access tracking */ - .ng = 1, /* Makes TLB flushes easier */ - .contig = 0, /* Assume non-contiguous */ - .xn = 1, /* No need to execute outside .text */ - .avail = 0, /* Reference count for domheap mapping */ - }};; - /* Setting the User bit is strange, but the ATS1H[RW] instructions - * don't seem to work otherwise, and since we never run on Xen - * pagetables in User mode it's OK. If this changes, remember - * to update the hard-coded values in head.S too */ - - switch ( attr ) - { - case BUFFERABLE: - /* - * ARM ARM: Overlaying the shareability attribute (DDI - * 0406C.b B3-1376 to 1377) - * - * A memory region with a resultant memory type attribute of Normal, - * and a resultant cacheability attribute of Inner Non-cacheable, - * Outer Non-cacheable, must have a resultant shareability attribute - * of Outer Shareable, otherwise shareability is UNPREDICTABLE. - * - * On ARMv8 sharability is ignored and explicitly treated as Outer - * Shareable for Normal Inner Non_cacheable, Outer Non-cacheable. - */ - e.pt.sh = LPAE_SH_OUTER; - break; - case UNCACHED: - case DEV_SHARED: - /* Shareability is ignored for non-Normal memory, Outer is as - * good as anything. - * - * On ARMv8 sharability is ignored and explicitly treated as Outer - * Shareable for any device memory type. - */ - e.pt.sh = LPAE_SH_OUTER; - break; - default: - e.pt.sh = LPAE_SH_INNER; /* Xen mappings are SMP coherent */ - break; - } - - ASSERT(!(pa & ~PAGE_MASK)); - ASSERT(!(pa & ~PADDR_MASK)); - - // XXX shifts - e.bits |= pa; - return e; -} - #if defined(CONFIG_ARM_32) # include <asm/arm32/page.h> #elif defined(CONFIG_ARM_64)
The file mm.c is the only user of mfn_to_xen_entry. This will also help to use the typesafe MFN. Signed-off-by: Julien Grall <julien.grall@arm.com> --- xen/arch/arm/mm.c | 65 ++++++++++++++++++++++++++++++++++++++++++++++ xen/include/asm-arm/page.h | 65 ---------------------------------------------- 2 files changed, 65 insertions(+), 65 deletions(-)