diff mbox series

[Xen-devel,v3,12/16] xen/arm: p2m: Move lpae_* helpers in lpae.h

Message ID 20170630155431.23824-13-julien.grall@arm.com
State Accepted
Commit 9f3bbd8df3c708cbeb56b4dad7b1a544b4b223b1
Headers show
Series xen/arm: Clean-up memory subsystems | expand

Commit Message

Julien Grall June 30, 2017, 3:54 p.m. UTC 
lpae_* helpers can work on any LPAE translation tables. Move them in
lpae.h to allow other part of Xen to use them.

Signed-off-by: Julien Grall <julien.grall@arm.com>
Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
---

Cc: proskurin@sec.in.tum.de

    Changes in v2:
        - Patch added

    Changes in v3:
        - Add Stefano's reviewed-by
---
 xen/arch/arm/p2m.c         | 23 -----------------------
 xen/include/asm-arm/lpae.h | 25 +++++++++++++++++++++++++
 2 files changed, 25 insertions(+), 23 deletions(-)

Comments

Sergej Proskurin July 2, 2017, 5:20 p.m. UTC | #1 
Hi Julien,

On 06/30/2017 05:54 PM, Julien Grall wrote:
> lpae_* helpers can work on any LPAE translation tables. Move them in
> lpae.h to allow other part of Xen to use them.
> 
> Signed-off-by: Julien Grall <julien.grall@arm.com>
> Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
> ---
> 
> Cc: proskurin@sec.in.tum.de
> 
>     Changes in v2:
>         - Patch added
> 
>     Changes in v3:
>         - Add Stefano's reviewed-by


Reviewed-by: Sergej Proskurin <proskurin@sec.in.tum.de>


> ---
>  xen/arch/arm/p2m.c         | 23 -----------------------
>  xen/include/asm-arm/lpae.h | 25 +++++++++++++++++++++++++
>  2 files changed, 25 insertions(+), 23 deletions(-)
> 
> diff --git a/xen/arch/arm/p2m.c b/xen/arch/arm/p2m.c
> index 381df1f237..9b7a580a87 100644
> --- a/xen/arch/arm/p2m.c
> +++ b/xen/arch/arm/p2m.c
> @@ -52,29 +52,6 @@ static const paddr_t level_masks[] =
>  static const uint8_t level_orders[] =
>      { ZEROETH_ORDER, FIRST_ORDER, SECOND_ORDER, THIRD_ORDER };
>  
> -static inline bool_t lpae_valid(lpae_t pte)
> -{
> -    return pte.walk.valid;
> -}
> -/*
> - * These two can only be used on L0..L2 ptes because L3 mappings set
> - * the table bit and therefore these would return the opposite to what
> - * you would expect.
> - */
> -static inline bool_t lpae_table(lpae_t pte)
> -{
> -    return lpae_valid(pte) && pte.walk.table;
> -}
> -static inline bool_t lpae_mapping(lpae_t pte)
> -{
> -    return lpae_valid(pte) && !pte.walk.table;
> -}
> -
> -static inline bool lpae_is_superpage(lpae_t pte, unsigned int level)
> -{
> -    return (level < 3) && lpae_mapping(pte);
> -}
> -
>  static void p2m_flush_tlb(struct p2m_domain *p2m);
>  
>  /* Unlock the flush and do a P2M TLB flush if necessary */
> diff --git a/xen/include/asm-arm/lpae.h b/xen/include/asm-arm/lpae.h
> index aa85cb8112..6fbf7c606c 100644
> --- a/xen/include/asm-arm/lpae.h
> +++ b/xen/include/asm-arm/lpae.h
> @@ -126,6 +126,31 @@ typedef union {
>      lpae_walk_t walk;
>  } lpae_t;
>  
> +static inline bool_t lpae_valid(lpae_t pte)
> +{
> +    return pte.walk.valid;
> +}
> +
> +/*
> + * These two can only be used on L0..L2 ptes because L3 mappings set
> + * the table bit and therefore these would return the opposite to what
> + * you would expect.
> + */
> +static inline bool_t lpae_table(lpae_t pte)
> +{
> +    return lpae_valid(pte) && pte.walk.table;
> +}
> +
> +static inline bool_t lpae_mapping(lpae_t pte)
> +{
> +    return lpae_valid(pte) && !pte.walk.table;
> +}
> +
> +static inline bool lpae_is_superpage(lpae_t pte, unsigned int level)
> +{
> +    return (level < 3) && lpae_mapping(pte);
> +}
> +
>  #endif /* __ASSEMBLY__ */
>  
>  /*
> 

Cheers,
~Sergej
diff mbox series

Patch

diff --git a/xen/arch/arm/p2m.c b/xen/arch/arm/p2m.c
index 381df1f237..9b7a580a87 100644
--- a/xen/arch/arm/p2m.c
+++ b/xen/arch/arm/p2m.c
@@ -52,29 +52,6 @@  static const paddr_t level_masks[] =
 static const uint8_t level_orders[] =
     { ZEROETH_ORDER, FIRST_ORDER, SECOND_ORDER, THIRD_ORDER };
 
-static inline bool_t lpae_valid(lpae_t pte)
-{
-    return pte.walk.valid;
-}
-/*
- * These two can only be used on L0..L2 ptes because L3 mappings set
- * the table bit and therefore these would return the opposite to what
- * you would expect.
- */
-static inline bool_t lpae_table(lpae_t pte)
-{
-    return lpae_valid(pte) && pte.walk.table;
-}
-static inline bool_t lpae_mapping(lpae_t pte)
-{
-    return lpae_valid(pte) && !pte.walk.table;
-}
-
-static inline bool lpae_is_superpage(lpae_t pte, unsigned int level)
-{
-    return (level < 3) && lpae_mapping(pte);
-}
-
 static void p2m_flush_tlb(struct p2m_domain *p2m);
 
 /* Unlock the flush and do a P2M TLB flush if necessary */
diff --git a/xen/include/asm-arm/lpae.h b/xen/include/asm-arm/lpae.h
index aa85cb8112..6fbf7c606c 100644
--- a/xen/include/asm-arm/lpae.h
+++ b/xen/include/asm-arm/lpae.h
@@ -126,6 +126,31 @@  typedef union {
     lpae_walk_t walk;
 } lpae_t;
 
+static inline bool_t lpae_valid(lpae_t pte)
+{
+    return pte.walk.valid;
+}
+
+/*
+ * These two can only be used on L0..L2 ptes because L3 mappings set
+ * the table bit and therefore these would return the opposite to what
+ * you would expect.
+ */
+static inline bool_t lpae_table(lpae_t pte)
+{
+    return lpae_valid(pte) && pte.walk.table;
+}
+
+static inline bool_t lpae_mapping(lpae_t pte)
+{
+    return lpae_valid(pte) && !pte.walk.table;
+}
+
+static inline bool lpae_is_superpage(lpae_t pte, unsigned int level)
+{
+    return (level < 3) && lpae_mapping(pte);
+}
+
 #endif /* __ASSEMBLY__ */
 
 /*