From patchwork Wed Jul 19 16:01:25 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mark Rutland X-Patchwork-Id: 108301 Delivered-To: patch@linaro.org Received: by 10.182.45.195 with SMTP id p3csp1011663obm; Wed, 19 Jul 2017 09:03:03 -0700 (PDT) X-Received: by 10.84.168.195 with SMTP id f61mr680268plb.234.1500480183859; Wed, 19 Jul 2017 09:03:03 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1500480183; cv=none; d=google.com; s=arc-20160816; b=MSdxSmHIvd56XdX2li9jQu5BLqDIUSi/DUN7yVCnjQz2FfTyWbYumX2NwqCWXjh0jZ 4AFmTYtftB2XTSNwrQnOAykPcvtwNDn9JGGzH04sShAXt6z4va7FZHFXFmlK+k61mQlv vXs4n5jXIEngdvMTdW4ItpPBMbf4EIxcFo9SpvgoyAeEvmuaRa0wlR9s+cX8uu6vdvqa Z+g6zE7ww5vy584tbilOb7DVj96tJBORdATv+NtfcPgpLPiv/Ilg96GXxfNB7mfYgc5j J6o8EgrvSXxi+8ZuLguPEEx8iBmDVvFEokWQstxEzbWH/tpHF+Jbad26P6VykMiBHFNF vnZA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:arc-authentication-results; bh=fa3eOWiet3sVJJ7JXPlXuIzZF74GWAYogHz2PwZvQ7Q=; b=QT12UyMzaLTSq6JAMnDYhAtC9/ZOHYXKhj26htV68PS2TPNGVcqbS4c/qa5/i6iucw ELBDcLLc1mRVhxlzauK3C7PpMMIJSdlO9U80fZLRXJSuzW5Tua6VwxWeYJvtFe0/81H/ U9T5Sox6ZFbKZ7DS2I7l+P60BW+2UqqYEQ2wBafpROTAMCA+h4Pemcq2Bp23WoLHm1jS Ph1CuzxsFshrBDYKJQ8T2NZcPzKVu8btIH6pEy39hXRxP2kTuj8oSHFQE8ZMz8gq3UoC ap58spjlnATE8SOo/BaiMUtRcGupIBF+0vEOq6zUVqT5Pc2uifUQ/9MMroVnAK/K20WY +E4g== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id s139si240442pgs.644.2017.07.19.09.03.03; Wed, 19 Jul 2017 09:03:03 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755162AbdGSQC7 (ORCPT + 25 others); Wed, 19 Jul 2017 12:02:59 -0400 Received: from usa-sjc-mx-foss1.foss.arm.com ([217.140.101.70]:42284 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932593AbdGSQC4 (ORCPT ); Wed, 19 Jul 2017 12:02:56 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id C25C715BF; Wed, 19 Jul 2017 09:02:55 -0700 (PDT) Received: from leverpostej.cambridge.arm.com (usa-sjc-imap-foss1.foss.arm.com [10.72.51.249]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 6AB683F577; Wed, 19 Jul 2017 09:02:53 -0700 (PDT) From: Mark Rutland To: linux-arm-kernel@lists.infradead.org Cc: arnd@arndb.de, catalin.marinas@arm.com, christoffer.dall@linaro.org, Dave.Martin@arm.com, jiong.wang@arm.com, kvmarm@lists.cs.columbia.edu, linux-arch@vger.kernel.org, marc.zyngier@arm.com, mark.rutland@arm.com, suzuki.poulose@arm.com, will.deacon@arm.com, yao.qi@arm.com, linux-kernel@vger.kernel.org, kernel-hardening@lists.openwall.com Subject: [PATCH 04/11] arm64/cpufeature: add ARMv8.3 id_aa64isar1 bits Date: Wed, 19 Jul 2017 17:01:25 +0100 Message-Id: <1500480092-28480-5-git-send-email-mark.rutland@arm.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1500480092-28480-1-git-send-email-mark.rutland@arm.com> References: <1500480092-28480-1-git-send-email-mark.rutland@arm.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org >From ARMv8.3 onwards, ID_AA64ISAR1 is no longer entirely RES0, and now has four fields describing the presence of pointer authentication functionality: * APA - address authentication present, using an architected algorithm * API - address authentication present, using an IMP DEF algorithm * GPA - generic authentication present, using an architected algorithm * GPI - generic authentication present, using an IMP DEF algoithm This patch adds the requisite definitions so that we can identify the presence of this functionality. For the timebeing, the features are hidden from userspace. Signed-off-by: Mark Rutland Cc: Catalin Marinas Cc: Will Deacon Cc: Suzuki K Poulose --- arch/arm64/kernel/cpufeature.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) -- 1.9.1 Reviewed-by: Suzuki K Poulose diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c index 9f9e0064..b23ad83 100644 --- a/arch/arm64/kernel/cpufeature.c +++ b/arch/arm64/kernel/cpufeature.c @@ -120,7 +120,11 @@ static int __init register_cpu_hwcaps_dumper(void) ARM64_FTR_BITS(FTR_VISIBLE, FTR_STRICT, FTR_EXACT, ID_AA64ISAR1_LRCPC_SHIFT, 4, 0), ARM64_FTR_BITS(FTR_VISIBLE, FTR_STRICT, FTR_EXACT, ID_AA64ISAR1_FCMA_SHIFT, 4, 0), ARM64_FTR_BITS(FTR_VISIBLE, FTR_STRICT, FTR_EXACT, ID_AA64ISAR1_JSCVT_SHIFT, 4, 0), - ARM64_FTR_END, + ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_EXACT, ID_AA64ISAR1_GPI_SHIFT, 4, 0), + ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_EXACT, ID_AA64ISAR1_GPA_SHIFT, 4, 0), + ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_EXACT, ID_AA64ISAR1_API_SHIFT, 4, 0), + ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_EXACT, ID_AA64ISAR1_APA_SHIFT, 4, 0), + ARM64_FTR_END }; static const struct arm64_ftr_bits ftr_id_aa64pfr0[] = {