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[192.237.175.120]) by mx.google.com with ESMTPS id r2si7029180iod.280.2017.08.14.07.26.19 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 14 Aug 2017 07:26:19 -0700 (PDT) Received-SPF: neutral (google.com: 192.237.175.120 is neither permitted nor denied by best guess record for domain of xen-devel-bounces@lists.xen.org) client-ip=192.237.175.120; Authentication-Results: mx.google.com; spf=neutral (google.com: 192.237.175.120 is neither permitted nor denied by best guess record for domain of xen-devel-bounces@lists.xen.org) smtp.mailfrom=xen-devel-bounces@lists.xen.org Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1dhGIj-00013b-Q7; Mon, 14 Aug 2017 14:25:05 +0000 Received: from mail6.bemta6.messagelabs.com ([193.109.254.103]) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1dhGIj-0000qm-2u for xen-devel@lists.xen.org; Mon, 14 Aug 2017 14:25:05 +0000 Received: from [193.109.254.147] by server-8.bemta-6.messagelabs.com id 2A/1A-09901-0C2B1995; Mon, 14 Aug 2017 14:25:04 +0000 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFnrELMWRWlGSWpSXmKPExsVysyfVTffApom RBrMXc1ss+biYxYHR4+ju30wBjFGsmXlJ+RUJrBmXb71gLZjHX7HszE3GBsb3PF2MnBxCApsZ JU635ncxcgHZpxklbky9ygSSYBPQlLjz+ROYLSIgLXHt82VGEJtZIFLi8Icf7CC2sICjxKrb3 WwgNouAqsSG7XPBbF4BK4nXr/aA2RIC8hK72i6ygticQPHOuztZIBZbSpxYPZttAiP3AkaGVY waxalFZalFuobmeklFmekZJbmJmTm6hgZmermpxcWJ6ak5iUnFesn5uZsYgf5lAIIdjLc3Bhx ilORgUhLlTfDpjRTiS8pPqcxILM6ILyrNSS0+xCjDwaEkwZu6cWKkkGBRanpqRVpmDjDQYNIS HDxKIryzQNK8xQWJucWZ6RCpU4y6HK8m/P/GJMSSl5+XKiXO+2oDUJEASFFGaR7cCFjQX2KUl RLmZQQ6SoinILUoN7MEVf4VozgHo5Iw72aQVTyZeSVwm14BHcEEdEQfyP28xSWJCCmpBkaOZZ vLnbNVtB86BvY7fwsJiFf6vKOgXNc47My+BVIx8jXHZcUf7ckLFFn59znj96pZiTrfJMruNx1 ukfN9WNR3NShCWXezcNtV/T1iGTzxGy6/mf8/fOv13d84ljZuK+acYFb6x9H5b9sZhYTeB4vy uHZ81xa4uyas7WphbGtG8Oq8yp5ocyWW4oxEQy3mouJEAJoGXXV1AgAA X-Env-Sender: julien.grall@arm.com X-Msg-Ref: server-8.tower-27.messagelabs.com!1502720703!100827991!1 X-Originating-IP: [217.140.101.70] X-SpamReason: No, hits=0.0 required=7.0 tests=UPPERCASE_25_50 X-StarScan-Received: X-StarScan-Version: 9.4.45; banners=-,-,- X-VirusChecked: Checked Received: (qmail 18124 invoked from network); 14 Aug 2017 14:25:04 -0000 Received: from foss.arm.com (HELO foss.arm.com) (217.140.101.70) by server-8.tower-27.messagelabs.com with SMTP; 14 Aug 2017 14:25:04 -0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 777C315A2; Mon, 14 Aug 2017 07:25:03 -0700 (PDT) Received: from e108454-lin.cambridge.arm.com (e108454-lin.cambridge.arm.com [10.1.206.53]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 8BEF23F483; Mon, 14 Aug 2017 07:25:02 -0700 (PDT) From: Julien Grall To: xen-devel@lists.xen.org Date: Mon, 14 Aug 2017 15:24:16 +0100 Message-Id: <20170814142418.13267-26-julien.grall@arm.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20170814142418.13267-1-julien.grall@arm.com> References: <20170814142418.13267-1-julien.grall@arm.com> Cc: andre.przywara@arm.com, Julien Grall , sstabellini@kernel.org Subject: [Xen-devel] [PATCH 25/27] xen/arm: mm: Embed permission in the flags X-BeenThere: xen-devel@lists.xen.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: xen-devel-bounces@lists.xen.org Sender: "Xen-devel" Currently, it is not possible to specify the permission of a new mapping. It would be necessary to use the function modify_xen_mappings with a different set of flags. Add introduce a couple of new flags for the permissions (Non-eXecutable, Read-Only) and also provides define that combine the memory attribute and permission for common combination. A follow-up patch will change modify_xen_mappings to use the new flags. Signed-off-by: Julien Grall Reviewed-by: Andre Przywara --- xen/include/asm-arm/page.h | 22 +++++++++++++++++++--- 1 file changed, 19 insertions(+), 3 deletions(-) diff --git a/xen/include/asm-arm/page.h b/xen/include/asm-arm/page.h index 1bf8e9d012..047220f86b 100644 --- a/xen/include/asm-arm/page.h +++ b/xen/include/asm-arm/page.h @@ -67,12 +67,28 @@ * Layout of the flags used for updating the hypervisor page tables * * [0:2] Memory Attribute Index + * [3:4] Permission flags */ #define PAGE_AI_MASK(x) ((x) & 0x7U) -#define PAGE_HYPERVISOR (MT_NORMAL) -#define PAGE_HYPERVISOR_NOCACHE (MT_DEVICE_nGnRE) -#define PAGE_HYPERVISOR_WC (MT_NORMAL_NC) +#define _PAGE_XN_BIT 3 +#define _PAGE_RO_BIT 4 +#define _PAGE_XN (1U << _PAGE_XN_BIT) +#define _PAGE_RO (1U << _PAGE_RO_BIT) +#define PAGE_XN_MASK(x) (((x) >> _PAGE_XN_BIT) & 0x1U) +#define PAGE_RO_MASK(x) (((x) >> _PAGE_RO_BIT) & 0x1U) + +/* Device memory will always be mapped read-write non-executable. */ +#define _PAGE_DEVICE _PAGE_XN +#define _PAGE_NORMAL MT_NORMAL + +#define PAGE_HYPERVISOR_RO (_PAGE_NORMAL|_PAGE_RO|_PAGE_XN) +#define PAGE_HYPERVISOR_RX (_PAGE_NORMAL|_PAGE_RO) +#define PAGE_HYPERVISOR_RW (_PAGE_NORMAL|_PAGE_XN) + +#define PAGE_HYPERVISOR PAGE_HYPERVISOR_RW +#define PAGE_HYPERVISOR_NOCACHE (_PAGE_DEVICE|MT_DEVICE_nGnRE) +#define PAGE_HYPERVISOR_WC (_PAGE_DEVICE|MT_NORMAL_NC) /* * Defines for changing the hypervisor PTE .ro and .nx bits. This is only to be