[Xen-devel,27/27] xen/arm: mm: Use memory flags for modify_xen_mappings rather than custom one

Message ID 20170814142418.13267-28-julien.grall@arm.com
State Superseded
Headers show
Series
  • xen/arm: Memory subsystem clean-up
Related show

Commit Message

Julien Grall Aug. 14, 2017, 2:24 p.m.
This will help to consolidate the page-table code and avoid different
path depending on the action to perform.

Signed-off-by: Julien Grall <julien.grall@arm.com>

---

Cc: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Cc: Ross Lagerwall <ross.lagerwall@citrix.com>

    arch_livepatch_secure is now the same as on x86. It might be
    possible to combine both, but I left that alone for now.
---
 xen/arch/arm/livepatch.c   |  6 +++---
 xen/arch/arm/mm.c          |  5 ++---
 xen/include/asm-arm/page.h | 11 -----------
 3 files changed, 5 insertions(+), 17 deletions(-)

Comments

Andre Przywara Aug. 23, 2017, 2:10 p.m. | #1
Hi,

On 14/08/17 15:24, Julien Grall wrote:
> This will help to consolidate the page-table code and avoid different
> path depending on the action to perform.
> 
> Signed-off-by: Julien Grall <julien.grall@arm.com>

It could be worth to mention in the commit message that the removed
ASSERT is now already cared for in create_xen_entries() (which is also
another hint to make that an ASSERT, actually).

Reviewed-by: Andre Przywara <andre.przywara@arm.com>

Cheers,
Andre.

> 
> ---
> 
> Cc: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
> Cc: Ross Lagerwall <ross.lagerwall@citrix.com>
> 
>     arch_livepatch_secure is now the same as on x86. It might be
>     possible to combine both, but I left that alone for now.
> ---
>  xen/arch/arm/livepatch.c   |  6 +++---
>  xen/arch/arm/mm.c          |  5 ++---
>  xen/include/asm-arm/page.h | 11 -----------
>  3 files changed, 5 insertions(+), 17 deletions(-)
> 
> diff --git a/xen/arch/arm/livepatch.c b/xen/arch/arm/livepatch.c
> index 3e53524365..279d52cc6c 100644
> --- a/xen/arch/arm/livepatch.c
> +++ b/xen/arch/arm/livepatch.c
> @@ -146,15 +146,15 @@ int arch_livepatch_secure(const void *va, unsigned int pages, enum va_type type)
>      switch ( type )
>      {
>      case LIVEPATCH_VA_RX:
> -        flags = PTE_RO; /* R set, NX clear */
> +        flags = PAGE_HYPERVISOR_RX;
>          break;
>  
>      case LIVEPATCH_VA_RW:
> -        flags = PTE_NX; /* R clear, NX set */
> +        flags = PAGE_HYPERVISOR_RW;
>          break;
>  
>      case LIVEPATCH_VA_RO:
> -        flags = PTE_NX | PTE_RO; /* R set, NX set */
> +        flags = PAGE_HYPERVISOR_RO;
>          break;
>  
>      default:
> diff --git a/xen/arch/arm/mm.c b/xen/arch/arm/mm.c
> index fe0646002e..c2fd4baef9 100644
> --- a/xen/arch/arm/mm.c
> +++ b/xen/arch/arm/mm.c
> @@ -1046,8 +1046,8 @@ static int create_xen_entries(enum xenmap_operation op,
>                  else
>                  {
>                      pte = *entry;
> -                    pte.pt.ro = PTE_RO_MASK(flags);
> -                    pte.pt.xn = PTE_NX_MASK(flags);
> +                    pte.pt.ro = PAGE_RO_MASK(flags);
> +                    pte.pt.xn = PAGE_XN_MASK(flags);
>                      if ( !pte.pt.ro && !pte.pt.xn )
>                      {
>                          printk("%s: Incorrect combination for addr=%lx\n",
> @@ -1090,7 +1090,6 @@ int destroy_xen_mappings(unsigned long v, unsigned long e)
>  
>  int modify_xen_mappings(unsigned long s, unsigned long e, unsigned int flags)
>  {
> -    ASSERT((flags & (PTE_NX | PTE_RO)) == flags);
>      return create_xen_entries(MODIFY, s, INVALID_MFN, (e - s) >> PAGE_SHIFT,
>                                flags);
>  }
> diff --git a/xen/include/asm-arm/page.h b/xen/include/asm-arm/page.h
> index 047220f86b..079097d429 100644
> --- a/xen/include/asm-arm/page.h
> +++ b/xen/include/asm-arm/page.h
> @@ -91,17 +91,6 @@
>  #define PAGE_HYPERVISOR_WC      (_PAGE_DEVICE|MT_NORMAL_NC)
>  
>  /*
> - * Defines for changing the hypervisor PTE .ro and .nx bits. This is only to be
> - * used with modify_xen_mappings.
> - */
> -#define _PTE_NX_BIT     0U
> -#define _PTE_RO_BIT     1U
> -#define PTE_NX          (1U << _PTE_NX_BIT)
> -#define PTE_RO          (1U << _PTE_RO_BIT)
> -#define PTE_NX_MASK(x)  (((x) >> _PTE_NX_BIT) & 0x1U)
> -#define PTE_RO_MASK(x)  (((x) >> _PTE_RO_BIT) & 0x1U)
> -
> -/*
>   * Stage 2 Memory Type.
>   *
>   * These are valid in the MemAttr[3:0] field of an LPAE stage 2 page
>
Julien Grall Aug. 23, 2017, 2:30 p.m. | #2
On 08/23/2017 03:10 PM, Andre Przywara wrote:
> Hi,

Hi,

> On 14/08/17 15:24, Julien Grall wrote:
>> This will help to consolidate the page-table code and avoid different
>> path depending on the action to perform.
>>
>> Signed-off-by: Julien Grall <julien.grall@arm.com>
> 
> It could be worth to mention in the commit message that the removed
> ASSERT is now already cared for in create_xen_entries() (which is also
> another hint to make that an ASSERT, actually).

If you look at the code modify_xen_mappings is using the operation 
MODIFY which already had a permission check without this series.

But this ASSERT here does not do what you think. It only check that the 
flags PTE_NX and PTE_RO could be set, not the mapping is non-executable 
and writeable.

Cheers,

Patch

diff --git a/xen/arch/arm/livepatch.c b/xen/arch/arm/livepatch.c
index 3e53524365..279d52cc6c 100644
--- a/xen/arch/arm/livepatch.c
+++ b/xen/arch/arm/livepatch.c
@@ -146,15 +146,15 @@  int arch_livepatch_secure(const void *va, unsigned int pages, enum va_type type)
     switch ( type )
     {
     case LIVEPATCH_VA_RX:
-        flags = PTE_RO; /* R set, NX clear */
+        flags = PAGE_HYPERVISOR_RX;
         break;
 
     case LIVEPATCH_VA_RW:
-        flags = PTE_NX; /* R clear, NX set */
+        flags = PAGE_HYPERVISOR_RW;
         break;
 
     case LIVEPATCH_VA_RO:
-        flags = PTE_NX | PTE_RO; /* R set, NX set */
+        flags = PAGE_HYPERVISOR_RO;
         break;
 
     default:
diff --git a/xen/arch/arm/mm.c b/xen/arch/arm/mm.c
index fe0646002e..c2fd4baef9 100644
--- a/xen/arch/arm/mm.c
+++ b/xen/arch/arm/mm.c
@@ -1046,8 +1046,8 @@  static int create_xen_entries(enum xenmap_operation op,
                 else
                 {
                     pte = *entry;
-                    pte.pt.ro = PTE_RO_MASK(flags);
-                    pte.pt.xn = PTE_NX_MASK(flags);
+                    pte.pt.ro = PAGE_RO_MASK(flags);
+                    pte.pt.xn = PAGE_XN_MASK(flags);
                     if ( !pte.pt.ro && !pte.pt.xn )
                     {
                         printk("%s: Incorrect combination for addr=%lx\n",
@@ -1090,7 +1090,6 @@  int destroy_xen_mappings(unsigned long v, unsigned long e)
 
 int modify_xen_mappings(unsigned long s, unsigned long e, unsigned int flags)
 {
-    ASSERT((flags & (PTE_NX | PTE_RO)) == flags);
     return create_xen_entries(MODIFY, s, INVALID_MFN, (e - s) >> PAGE_SHIFT,
                               flags);
 }
diff --git a/xen/include/asm-arm/page.h b/xen/include/asm-arm/page.h
index 047220f86b..079097d429 100644
--- a/xen/include/asm-arm/page.h
+++ b/xen/include/asm-arm/page.h
@@ -91,17 +91,6 @@ 
 #define PAGE_HYPERVISOR_WC      (_PAGE_DEVICE|MT_NORMAL_NC)
 
 /*
- * Defines for changing the hypervisor PTE .ro and .nx bits. This is only to be
- * used with modify_xen_mappings.
- */
-#define _PTE_NX_BIT     0U
-#define _PTE_RO_BIT     1U
-#define PTE_NX          (1U << _PTE_NX_BIT)
-#define PTE_RO          (1U << _PTE_RO_BIT)
-#define PTE_NX_MASK(x)  (((x) >> _PTE_NX_BIT) & 0x1U)
-#define PTE_RO_MASK(x)  (((x) >> _PTE_RO_BIT) & 0x1U)
-
-/*
  * Stage 2 Memory Type.
  *
  * These are valid in the MemAttr[3:0] field of an LPAE stage 2 page