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[213.113.113.86]) by smtp.gmail.com with ESMTPSA id v29sm2357845ljv.27.2017.11.05.15.23.13 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Sun, 05 Nov 2017 15:23:13 -0800 (PST) From: Linus Walleij To: Andrew Lunn , Vivien Didelot , Florian Fainelli Cc: netdev@vger.kernel.org, Linus Walleij , =?utf-8?b?QW50dGkgU2VwcMOkbMOk?= , Roman Yeryomin , Colin Leitner , Gabor Juhos Subject: [PATCH 2/4] RFC: net: phy: realtek: Support RTL8366RB variant Date: Mon, 6 Nov 2017 00:19:07 +0100 Message-Id: <20171105231909.5599-3-linus.walleij@linaro.org> X-Mailer: git-send-email 2.13.6 In-Reply-To: <20171105231909.5599-1-linus.walleij@linaro.org> References: <20171105231909.5599-1-linus.walleij@linaro.org> MIME-Version: 1.0 Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org The RTL8366RB is an ASIC with five internal PHYs for LAN0..LAN3 and WAN. The PHYs are spawn off the main device so they can be handled in a distributed manner by the Realtek PHY driver. All that is really needed is the power save feature enablement and letting the PHY driver core pick up the IRQ from the switch chip. Cc: Antti Seppälä Cc: Roman Yeryomin Cc: Colin Leitner Cc: Gabor Juhos Cc: Florian Fainelli Signed-off-by: Linus Walleij --- drivers/net/phy/realtek.c | 32 ++++++++++++++++++++++++++++++++ 1 file changed, 32 insertions(+) -- 2.13.6 diff --git a/drivers/net/phy/realtek.c b/drivers/net/phy/realtek.c index 9cbe645e3d89..2fb2eb7a32be 100644 --- a/drivers/net/phy/realtek.c +++ b/drivers/net/phy/realtek.c @@ -29,6 +29,9 @@ #define RTL8211F_PAGE_SELECT 0x1f #define RTL8211F_TX_DELAY 0x100 +#define RTL8366RB_POWER_SAVE 0x21 +#define RTL8366RB_POWER_SAVE_ON 0x1000 + MODULE_DESCRIPTION("Realtek PHY driver"); MODULE_AUTHOR("Johnson Leung"); MODULE_LICENSE("GPL"); @@ -119,6 +122,22 @@ static int rtl8211f_config_init(struct phy_device *phydev) return 0; } +static int rtl8366rb_config_init(struct phy_device *phydev) +{ + int ret; + u16 reg; + + ret = genphy_config_init(phydev); + if (ret < 0) + return ret; + + reg = phy_read(phydev, RTL8366RB_POWER_SAVE); + reg |= RTL8366RB_POWER_SAVE_ON; + phy_write(phydev, RTL8366RB_POWER_SAVE, reg); + + return 0; +} + static struct phy_driver realtek_drvs[] = { { .phy_id = 0x00008201, @@ -175,6 +194,18 @@ static struct phy_driver realtek_drvs[] = { .config_intr = &rtl8211f_config_intr, .suspend = genphy_suspend, .resume = genphy_resume, + }, { + /* The main part of this DSA is in drivers/net/dsa */ + .phy_id = 0x001cc961, + .name = "RTL8366RB Gigabit Ethernet", + .phy_id_mask = 0x001fffff, + .features = PHY_GBIT_FEATURES, + .flags = PHY_HAS_INTERRUPT, + .config_aneg = &genphy_config_aneg, + .config_init = &rtl8366rb_config_init, + .read_status = &genphy_read_status, + .suspend = genphy_suspend, + .resume = genphy_resume, }, }; @@ -185,6 +216,7 @@ static struct mdio_device_id __maybe_unused realtek_tbl[] = { { 0x001cc914, 0x001fffff }, { 0x001cc915, 0x001fffff }, { 0x001cc916, 0x001fffff }, + { 0x001cc961, 0x001fffff }, { } };