diff mbox series

[committed,AArch64] More aarch64_endian_lane_rtx

Message ID 87o9o6eggy.fsf@linaro.org
State New
Headers show
Series [committed,AArch64] More aarch64_endian_lane_rtx | expand

Commit Message

Richard Sandiford Nov. 13, 2017, 8:21 a.m. UTC 
r254466 failed to update some uses of ENDIAN_LANE_N that were added after
the patch was initially written, which meant that we were treating the
mode number as an element count.

Tested on aarch64-linux-gnu and aarch64_be-elf and installed as obvious.
Sorry for the breakage...

Richard


2017-11-13  Richard Sandiford  <richard.sandiford@linaro.org>

gcc/
	* config/aarch64/aarch64-simd.md (aarch64_store_lane0<mode>):
	Upddate call to ENDIAN_LANE_N.
	(aarch64_<sur>dot_lane<vsi2qi>): Use aarch64_endian_lane_rtx.
	(aarch64_<sur>dot_laneq<vsi2qi>): Likewise.
	(*aarch64_simd_vec_copy_lane<mode>): Update calls to ENDIAN_LANE_N
	and use aarch64_endian_lane_rtx.
	(*aarch64_simd_vec_copy_lane_<vswap_width_name><mode>): Likewise.
diff mbox series

Patch

Index: gcc/config/aarch64/aarch64-simd.md
===================================================================
--- gcc/config/aarch64/aarch64-simd.md	2017-11-09 14:21:44.843800048 +0000
+++ gcc/config/aarch64/aarch64-simd.md	2017-11-13 08:18:32.555560682 +0000
@@ -173,7 +173,7 @@  (define_insn "aarch64_store_lane0<mode>"
 	(vec_select:<VEL> (match_operand:VALL_F16 1 "register_operand" "w")
 			(parallel [(match_operand 2 "const_int_operand" "n")])))]
   "TARGET_SIMD
-   && ENDIAN_LANE_N (<MODE>mode, INTVAL (operands[2])) == 0"
+   && ENDIAN_LANE_N (<nunits>, INTVAL (operands[2])) == 0"
   "str\\t%<Vetype>1, %0"
   [(set_attr "type" "neon_store1_1reg<q>")]
 )
@@ -450,8 +450,7 @@  (define_insn "aarch64_<sur>dot_lane<vsi2
 		DOTPROD)))]
   "TARGET_DOTPROD"
   {
-    operands[4]
-      = GEN_INT (ENDIAN_LANE_N (V8QImode, INTVAL (operands[4])));
+    operands[4] = aarch64_endian_lane_rtx (V8QImode, INTVAL (operands[4]));
     return "<sur>dot\\t%0.<Vtype>, %2.<Vdottype>, %3.4b[%4]";
   }
   [(set_attr "type" "neon_dot")]
@@ -466,8 +465,7 @@  (define_insn "aarch64_<sur>dot_laneq<vsi
 		DOTPROD)))]
   "TARGET_DOTPROD"
   {
-    operands[4]
-      = GEN_INT (ENDIAN_LANE_N (V16QImode, INTVAL (operands[4])));
+    operands[4] = aarch64_endian_lane_rtx (V16QImode, INTVAL (operands[4]));
     return "<sur>dot\\t%0.<Vtype>, %2.<Vdottype>, %3.4b[%4]";
   }
   [(set_attr "type" "neon_dot")]
@@ -734,9 +732,9 @@  (define_insn "*aarch64_simd_vec_copy_lan
 	    (match_operand:SI 2 "immediate_operand" "i")))]
   "TARGET_SIMD"
   {
-    int elt = ENDIAN_LANE_N (<MODE>mode, exact_log2 (INTVAL (operands[2])));
+    int elt = ENDIAN_LANE_N (<nunits>, exact_log2 (INTVAL (operands[2])));
     operands[2] = GEN_INT (HOST_WIDE_INT_1 << elt);
-    operands[4] = GEN_INT (ENDIAN_LANE_N (<MODE>mode, INTVAL (operands[4])));
+    operands[4] = aarch64_endian_lane_rtx (<MODE>mode, INTVAL (operands[4]));
 
     return "ins\t%0.<Vetype>[%p2], %3.<Vetype>[%4]";
   }
@@ -755,10 +753,10 @@  (define_insn "*aarch64_simd_vec_copy_lan
 	    (match_operand:SI 2 "immediate_operand" "i")))]
   "TARGET_SIMD"
   {
-    int elt = ENDIAN_LANE_N (<MODE>mode, exact_log2 (INTVAL (operands[2])));
+    int elt = ENDIAN_LANE_N (<nunits>, exact_log2 (INTVAL (operands[2])));
     operands[2] = GEN_INT (HOST_WIDE_INT_1 << elt);
-    operands[4] = GEN_INT (ENDIAN_LANE_N (<VSWAP_WIDTH>mode,
-			   INTVAL (operands[4])));
+    operands[4] = aarch64_endian_lane_rtx (<VSWAP_WIDTH>mode,
+					   INTVAL (operands[4]));
 
     return "ins\t%0.<Vetype>[%p2], %3.<Vetype>[%4]";
   }