diff mbox

[7/7] hw/pl031: Use LOG_GUEST_ERROR

Message ID 1350220276-16349-8-git-send-email-peter.maydell@linaro.org
State Superseded
Headers show

Commit Message

Peter Maydell Oct. 14, 2012, 1:11 p.m. UTC 
Use LOG_GUEST_ERROR rather than hw_error or direct fprintf.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
 hw/pl031.c | 17 +++++++++++------
 1 file changed, 11 insertions(+), 6 deletions(-)
diff mbox

Patch

diff --git a/hw/pl031.c b/hw/pl031.c
index 9602664..a718d2e 100644
--- a/hw/pl031.c
+++ b/hw/pl031.c
@@ -14,6 +14,7 @@ 
 #include "sysbus.h"
 #include "qemu-timer.h"
 #include "sysemu.h"
+#include "qemu-log.h"
 
 //#define DEBUG_PL031
 
@@ -120,11 +121,13 @@  static uint64_t pl031_read(void *opaque, target_phys_addr_t offset,
     case RTC_MIS:
         return s->is & s->im;
     case RTC_ICR:
-        fprintf(stderr, "qemu: pl031_read: Unexpected offset 0x%x\n",
-                (int)offset);
+        qemu_log_mask(LOG_GUEST_ERROR,
+                      "pl031: read of write-only register at offset 0x%x\n",
+                      (int)offset);
         break;
     default:
-        hw_error("pl031_read: Bad offset 0x%x\n", (int)offset);
+        qemu_log_mask(LOG_GUEST_ERROR,
+                      "pl031_read: Bad offset 0x%x\n", (int)offset);
         break;
     }
 
@@ -167,12 +170,14 @@  static void pl031_write(void * opaque, target_phys_addr_t offset,
     case RTC_DR:
     case RTC_MIS:
     case RTC_RIS:
-        fprintf(stderr, "qemu: pl031_write: Unexpected offset 0x%x\n",
-                (int)offset);
+        qemu_log_mask(LOG_GUEST_ERROR,
+                      "pl031: write to read-only register at offset 0x%x\n",
+                      (int)offset);
         break;
 
     default:
-        hw_error("pl031_write: Bad offset 0x%x\n", (int)offset);
+        qemu_log_mask(LOG_GUEST_ERROR,
+                      "pl031_write: Bad offset 0x%x\n", (int)offset);
         break;
     }
 }