diff mbox series

[committed,rs6000] Use gen_int_mode in ieee_128bit_negative_zero

Message ID 878tdminy1.fsf@linaro.org
State New
Headers show
Series [committed,rs6000] Use gen_int_mode in ieee_128bit_negative_zero | expand

Commit Message

Richard Sandiford Dec. 28, 2017, 8:42 p.m. UTC 
Previously we'd generate a non-canonical zero-extended CONST_INT
instead of a sign-extended one, which tripped the assert for
canonical CONST_INTs after a later patch.

Tested on powerpc64le-linux-gnu and installed as obvious.

Richard


2017-12-28  Richard Sandiford  <richard.sandiford@linaro.org>

gcc/
	* config/powerpcspe/powerpcspe.md (ieee_128bit_negative_zero): Use
	gen_int_mode rather than GEN_INT.
	* config/rs6000/rs6000.md (ieee_128bit_negative_zero): Likewise.
diff mbox series

Patch

Index: gcc/config/powerpcspe/powerpcspe.md
===================================================================
--- gcc/config/powerpcspe/powerpcspe.md	2017-09-04 11:50:08.531037669 +0100
+++ gcc/config/powerpcspe/powerpcspe.md	2017-12-28 16:56:59.791383685 +0000
@@ -8113,7 +8113,7 @@  (define_expand "ieee_128bit_negative_zer
     RTVEC_ELT (v, i) = const0_rtx;
 
   high = (BYTES_BIG_ENDIAN) ? 0 : 15;
-  RTVEC_ELT (v, high) = GEN_INT (0x80);
+  RTVEC_ELT (v, high) = gen_int_mode (0x80, QImode);
 
   rs6000_expand_vector_init (operands[0], gen_rtx_PARALLEL (V16QImode, v));
   DONE;
Index: gcc/config/rs6000/rs6000.md
===================================================================
--- gcc/config/rs6000/rs6000.md	2017-12-07 18:38:16.674205190 +0000
+++ gcc/config/rs6000/rs6000.md	2017-12-28 16:56:59.792384020 +0000
@@ -8055,7 +8055,7 @@  (define_expand "ieee_128bit_negative_zer
     RTVEC_ELT (v, i) = const0_rtx;
 
   high = (BYTES_BIG_ENDIAN) ? 0 : 15;
-  RTVEC_ELT (v, high) = GEN_INT (0x80);
+  RTVEC_ELT (v, high) = gen_int_mode (0x80, QImode);
 
   rs6000_expand_vector_init (operands[0], gen_rtx_PARALLEL (V16QImode, v));
   DONE;