diff mbox series

[v6,15/25] arm: imx: hab: Implement hab_rvt_check_target

Message ID 1515760819-15116-16-git-send-email-bryan.odonoghue@linaro.org
State Accepted
Commit c0a55b7344d4ed0b003e3f9696663539f50aaacb
Headers show
Series Fix and extend i.MX HAB layer | expand

Commit Message

Bryan O'Donoghue Jan. 12, 2018, 12:40 p.m. UTC 
This patch implements the basic callback hooks for hab_rvt_check_target()
for BootROM code using the older BootROM address layout - in my test case
the i.MX7. Code based on new BootROM callbacks will just have HAB_SUCCESS
as a result code. Adding support for the new BootROM callbacks is a TODO.

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Sven Ebenfeld <sven.ebenfeld@gmail.com>
Cc: George McCollister <george.mccollister@gmail.com>
Cc: Breno Matheus Lima <brenomatheus@gmail.com>
Tested-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
---
 arch/arm/mach-imx/hab.c | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)
diff mbox series

Patch

diff --git a/arch/arm/mach-imx/hab.c b/arch/arm/mach-imx/hab.c
index 364bd6b..2a18ea2 100644
--- a/arch/arm/mach-imx/hab.c
+++ b/arch/arm/mach-imx/hab.c
@@ -70,6 +70,24 @@ 
 	((hab_rvt_exit_t *)HAB_RVT_EXIT)			\
 )
 
+static inline enum hab_status hab_rvt_check_target_new(enum hab_target target,
+						       const void *start,
+						       size_t bytes)
+{
+	return HAB_SUCCESS;
+}
+
+#define hab_rvt_check_target_p					\
+(								\
+	(is_mx6dqp()) ?						\
+	((hab_rvt_check_target_t *)hab_rvt_check_target_new) :	\
+	(is_mx6dq() && (soc_rev() >= CHIP_REV_1_5)) ?		\
+	((hab_rvt_check_target_t *)hab_rvt_check_target_new) :	\
+	(is_mx6sdl() &&	(soc_rev() >= CHIP_REV_1_2)) ?		\
+	((hab_rvt_check_target_t *)hab_rvt_check_target_new) :	\
+	((hab_rvt_check_target_t *)HAB_RVT_CHECK_TARGET)	\
+)
+
 #define ALIGN_SIZE		0x1000
 #define MX6DQ_PU_IROM_MMU_EN_VAR	0x009024a8
 #define MX6DLS_PU_IROM_MMU_EN_VAR	0x00901dd0