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[PULL,v4,41/43] hw/hppa: Add MAINTAINERS entry

Message ID	20180128231528.22719-42-richard.henderson@linaro.org
State	New
Headers	show Delivered-To: patch@linaro.org Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) client-ip=2001:4830:134:3::11; From: Richard Henderson <richard.henderson@linaro.org> To: qemu-devel@nongnu.org Date: Sun, 28 Jan 2018 15:15:26 -0800 Message-Id: <20180128231528.22719-42-richard.henderson@linaro.org> In-Reply-To: <20180128231528.22719-1-richard.henderson@linaro.org> References: <20180128231528.22719-1-richard.henderson@linaro.org> Subject: [Qemu-devel] [PULL v4 41/43] hw/hppa: Add MAINTAINERS entry Precedence: list Cc: peter.maydell@linaro.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" <qemu-devel-bounces+patch=linaro.org@nongnu.org>
Series	hppa-softmmu \| expand [PULL,v4,00/43] hppa-softmmu [PULL,v4,01/43] target/hppa: Skeleton support for hppa-softmmu [PULL,v4,02/43] target/hppa: Define the rest of the PSW [PULL,v4,03/43] target/hppa: Disable gateway page emulation for system mode [PULL,v4,04/43] target/hppa: Define hardware exception types [PULL,v4,05/43] target/hppa: Split address size from register size [PULL,v4,06/43] target/hppa: Implement mmu_idx from IA privilege level [PULL,v4,07/43] target/hppa: Implement the system mask instructions [PULL,v4,08/43] target/hppa: Add space registers [PULL,v4,09/43] target/hppa: Add control registers [PULL,v4,10/43] target/hppa: Adjust insn mask for mfctl, w [PULL,v4,11/43] target/hppa: Implement rfi [PULL,v4,12/43] target/hppa: Fill in hppa_cpu_do_interrupt/hppa_cpu_exec_interrupt [PULL,v4,13/43] target/hppa: Implement unaligned access trap [PULL,v4,14/43] target/hppa: Use space registers in data operations [PULL,v4,15/43] target/hppa: Avoid privilege level decrease during branches [PULL,v4,16/43] target/hppa: Implement IASQ [PULL,v4,17/43] target/hppa: Implement tlb_fill [PULL,v4,18/43] target/hppa: Implement external interrupts [PULL,v4,19/43] target/hppa: Implement the interval timer [PULL,v4,20/43] target/hppa: Log unimplemented instructions [PULL,v4,21/43] target/hppa: Implement ITLBA and ITLBP insns [PULL,v4,22/43] target/hppa: Implement PTLB and PTLBE insns [PULL,v4,23/43] target/hppa: Implement LDWA [PULL,v4,24/43] target/hppa: Implement LPA [PULL,v4,25/43] target/hppa: Implement LCI [PULL,v4,26/43] target/hppa: Implement SYNCDMA insn [PULL,v4,27/43] target/hppa: Implement halt and reset instructions [PULL,v4,28/43] target/hppa: Optimize for flat addressing space [PULL,v4,29/43] target/hppa: Add system registers to gdbstub [PULL,v4,30/43] target/hppa: Add migration for the cpu [PULL,v4,31/43] target/hppa: Implement B,GATE insn [PULL,v4,32/43] target/hppa: Only use EXCP_DTLB_MISS [PULL,v4,33/43] target/hppa: Increase number of temp regs [PULL,v4,34/43] target/hppa: Fix comment [PULL,v4,35/43] target/hppa: Implement LDSID for system mode [PULL,v4,36/43] target/hppa: Implement a pause instruction [PULL,v4,37/43] target/hppa: Implement STWA [PULL,v4,38/43] target/hppa: Enable MTTCG [PULL,v4,39/43] hw/hppa: Implement DINO system board [PULL,v4,40/43] pc-bios: Add hppa-firmware.img and git submodule [PULL,v4,41/43] hw/hppa: Add MAINTAINERS entry [PULL,v4,42/43] target/hppa: Fix 32-bit operand masks for 0E FCVT [PULL,v4,43/43] target/hppa: Implement PROBE for system mode

Commit Message

Richard Henderson Jan. 28, 2018, 11:15 p.m. UTC

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

---
 MAINTAINERS | 1 +
 1 file changed, 1 insertion(+)

-- 
2.14.3

diff mbox series

Patch

diff --git a/MAINTAINERS b/MAINTAINERS
index 753e7996ce..bee6b2bec7 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -133,6 +133,7 @@  HPPA (PA-RISC)
 M: Richard Henderson <rth@twiddle.net>
 S: Maintained
 F: target/hppa/
+F: hw/hppa/
 F: disas/hppa.c
 
 LM32