| Message ID | 20180214122223.20590-1-julien.grall@arm.com |
|---|---|
| State | Accepted |
| Commit | 27196d4cc917d91b5b5daee50173565139ca9c9d |
| Headers | show |
| Series | [Xen-devel] xen/arm: cpuerrata: Actually check errata on non-boot CPUs | expand |
On Wed, 14 Feb 2018, Julien Grall wrote: > The cpu errata framework was introduced in commit 8b01f6364f "xen/arm: > Detect silicon revision and set cap bits accordingly" and was meant to > detect errata present on any CPUs (via check_local_cpu_errata). However, > the function to check the MIDR (is_affected_midr_range) mistakenly > always use the boot CPU MIDR. > > Fix is_affected_midr_range to use the current CPU MIDR. > > Reported-by: Stefano Stabellini <sstabellini@kernel.org> > Signed-off-by: Julien Grall <julien.grall@arm.com> Reviewed-by: Stefano Stabellini <sstabellini@kernel.org> > --- > This should be backported up to Xen 4.7 as the cpu errata framework > was backported for XSA-254. > --- > xen/arch/arm/cpuerrata.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/xen/arch/arm/cpuerrata.c b/xen/arch/arm/cpuerrata.c > index 9c7458ef06..c243521ed4 100644 > --- a/xen/arch/arm/cpuerrata.c > +++ b/xen/arch/arm/cpuerrata.c > @@ -230,7 +230,7 @@ static int enable_ic_inv_hardening(void *data) > static bool __maybe_unused > is_affected_midr_range(const struct arm_cpu_capabilities *entry) > { > - return MIDR_IS_CPU_MODEL_RANGE(boot_cpu_data.midr.bits, entry->midr_model, > + return MIDR_IS_CPU_MODEL_RANGE(current_cpu_data.midr.bits, entry->midr_model, > entry->midr_range_min, > entry->midr_range_max); > } > -- > 2.11.0 >
diff --git a/xen/arch/arm/cpuerrata.c b/xen/arch/arm/cpuerrata.c index 9c7458ef06..c243521ed4 100644 --- a/xen/arch/arm/cpuerrata.c +++ b/xen/arch/arm/cpuerrata.c @@ -230,7 +230,7 @@ static int enable_ic_inv_hardening(void *data) static bool __maybe_unused is_affected_midr_range(const struct arm_cpu_capabilities *entry) { - return MIDR_IS_CPU_MODEL_RANGE(boot_cpu_data.midr.bits, entry->midr_model, + return MIDR_IS_CPU_MODEL_RANGE(current_cpu_data.midr.bits, entry->midr_model, entry->midr_range_min, entry->midr_range_max); }
The cpu errata framework was introduced in commit 8b01f6364f "xen/arm: Detect silicon revision and set cap bits accordingly" and was meant to detect errata present on any CPUs (via check_local_cpu_errata). However, the function to check the MIDR (is_affected_midr_range) mistakenly always use the boot CPU MIDR. Fix is_affected_midr_range to use the current CPU MIDR. Reported-by: Stefano Stabellini <sstabellini@kernel.org> Signed-off-by: Julien Grall <julien.grall@arm.com> --- This should be backported up to Xen 4.7 as the cpu errata framework was backported for XSA-254. --- xen/arch/arm/cpuerrata.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)