diff mbox series

[PATCHv2,08/17] drm/omap: Add pclk setting case when channel is DSS_WB

Message ID 1519817174-20714-9-git-send-email-tomi.valkeinen@ti.com
State Accepted
Commit 9deb5ad3c47ead2b3c63e44435e9eff0f6f38835
Headers show
Series drm/omap: misc patches | expand

Commit Message

Tomi Valkeinen Feb. 28, 2018, 11:26 a.m. UTC 
From: Benoit Parrot <bparrot@ti.com>

In dispc_set_ovl_common() we need to initialize pclk to a valid
value when we use WB in capture mode (i.e. mem_2_mem is false).
Otherwise dispc_ovl_calc_scaling() fails.

Signed-off-by: Benoit Parrot <bparrot@ti.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
---
 drivers/gpu/drm/omapdrm/dss/dispc.c | 4 ++++
 1 file changed, 4 insertions(+)
diff mbox series

Patch

diff --git a/drivers/gpu/drm/omapdrm/dss/dispc.c b/drivers/gpu/drm/omapdrm/dss/dispc.c
index f0f729fc4ca2..3ad56b30c90a 100644
--- a/drivers/gpu/drm/omapdrm/dss/dispc.c
+++ b/drivers/gpu/drm/omapdrm/dss/dispc.c
@@ -2590,6 +2590,10 @@  static int dispc_ovl_setup_common(struct dispc_device *dispc,
 	unsigned long pclk = dispc_plane_pclk_rate(dispc, plane);
 	unsigned long lclk = dispc_plane_lclk_rate(dispc, plane);
 
+	/* when setting up WB, dispc_plane_pclk_rate() returns 0 */
+	if (plane == OMAP_DSS_WB)
+		pclk = vm->pixelclock;
+
 	if (paddr == 0 && rotation_type != OMAP_DSS_ROT_TILER)
 		return -EINVAL;