diff mbox series

[2/2] target/arm: Tidy condition in disas_simd_two_reg_misc

Message ID 20180501180455.11214-3-richard.henderson@linaro.org
State Superseded
Headers show
Series target/arm: Coverity fixups | expand

Commit Message

Richard Henderson May 1, 2018, 6:04 p.m. UTC
Path analysis shows that size == 3 && !is_q has been eliminated.

Fixes: Coverity CID1385853
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

---
 target/arm/translate-a64.c | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

-- 
2.14.3

Comments

Alex Bennée May 2, 2018, 9:47 a.m. UTC | #1
Richard Henderson <richard.henderson@linaro.org> writes:

> Path analysis shows that size == 3 && !is_q has been eliminated.

>

> Fixes: Coverity CID1385853

> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


Reviewed-by: Alex Bennée <alex.bennee@linaro.org>


> ---

>  target/arm/translate-a64.c | 6 +++++-

>  1 file changed, 5 insertions(+), 1 deletion(-)

>

> diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c

> index 97950dce1a..6d49f30b4a 100644

> --- a/target/arm/translate-a64.c

> +++ b/target/arm/translate-a64.c

> @@ -11473,7 +11473,11 @@ static void disas_simd_two_reg_misc(DisasContext *s, uint32_t insn)

>          /* All 64-bit element operations can be shared with scalar 2misc */

>          int pass;

>

> -        for (pass = 0; pass < (is_q ? 2 : 1); pass++) {

> +        /* Coverity claims (size == 3 && !is_q) has been eliminated

> +         * from all paths leading to here.

> +         */

> +        tcg_debug_assert(is_q);

> +        for (pass = 0; pass < 2; pass++) {

>              TCGv_i64 tcg_op = tcg_temp_new_i64();

>              TCGv_i64 tcg_res = tcg_temp_new_i64();



--
Alex Bennée
diff mbox series

Patch

diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c
index 97950dce1a..6d49f30b4a 100644
--- a/target/arm/translate-a64.c
+++ b/target/arm/translate-a64.c
@@ -11473,7 +11473,11 @@  static void disas_simd_two_reg_misc(DisasContext *s, uint32_t insn)
         /* All 64-bit element operations can be shared with scalar 2misc */
         int pass;
 
-        for (pass = 0; pass < (is_q ? 2 : 1); pass++) {
+        /* Coverity claims (size == 3 && !is_q) has been eliminated
+         * from all paths leading to here.
+         */
+        tcg_debug_assert(is_q);
+        for (pass = 0; pass < 2; pass++) {
             TCGv_i64 tcg_op = tcg_temp_new_i64();
             TCGv_i64 tcg_res = tcg_temp_new_i64();