===================================================================
@@ -10282,16 +10282,16 @@
and has length @code{((pc[-3]) & 0xff000000)}.
@item -mthumb
+@itemx -marm
+@opindex marm
@opindex mthumb
-Generate code for the Thumb instruction set. The default is to
-use the 32-bit ARM instruction set.
-This option automatically enables either 16-bit Thumb-1 or
-mixed 16/32-bit Thumb-2 instructions based on the @option{-mcpu=@var{name}}
-and @option{-march=@var{name}} options. This option is not passed to the
-assembler. If you want to force assembler files to be interpreted as Thumb code,
-either add a @samp{.thumb} directive to the source or pass the @option{-mthumb}
-option directly to the assembler by prefixing it with @option{-Wa}.
+Select between generating code that executes in ARM and Thumb
+states. The default for most configurations is to generate code
+that executes in ARM state, but the default can be changed by
+configuring GCC with the @option{--with-mode=}@var{state}
+configure option.
+
@item -mtpcs-frame
@opindex mtpcs-frame
Generate a stack frame that is compliant with the Thumb Procedure Call
===================================================================
@@ -52,7 +52,8 @@
Specify the name of the target architecture
marm
-Target RejectNegative InverseMask(THUMB) Undocumented
+Target Report RejectNegative InverseMask(THUMB)
+Generate code in 32 bit ARM state.
mbig-endian
Target Report RejectNegative Mask(BIG_END)
@@ -131,8 +132,8 @@
Specify the minimum bit alignment of structures
mthumb
-Target Report Mask(THUMB)
-Compile for the Thumb not the ARM
+Target Report RejectNegative Mask(THUMB)
+Generate code for Thumb state
mthumb-interwork
Target Report Mask(INTERWORK)