@@ -32,8 +32,12 @@ COBJS += tzpc_init.o
COBJS += smdk5250_spl.o
ifndef CONFIG_SPL_BUILD
+ifdef CONFIG_OF_CONTROL
+COBJS += exynos5-dt.o
+else
COBJS += smdk5250.o
endif
+endif
ifdef CONFIG_SPL_BUILD
COBJS += spl_boot.o
new file mode 100644
@@ -0,0 +1,235 @@
+/*
+ * Copyright (C) 2012 Samsung Electronics
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <fdtdec.h>
+#include <asm/io.h>
+#include <i2c.h>
+#include <netdev.h>
+#include <spi.h>
+#include <asm/arch/cpu.h>
+#include <asm/arch/dwmmc.h>
+#include <asm/arch/gpio.h>
+#include <asm/arch/mmc.h>
+#include <asm/arch/pinmux.h>
+#include <asm/arch/sromc.h>
+#include <pmic.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int board_init(void)
+{
+ gd->bd->bi_boot_params = (PHYS_SDRAM_1 + 0x100UL);
+#if defined(CONFIG_PMIC)
+ pmic_init();
+#endif
+#ifdef CONFIG_EXYNOS_SPI
+ spi_init();
+#endif
+ return 0;
+}
+
+int dram_init(void)
+{
+ gd->ram_size = get_ram_size((long *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE)
+ + get_ram_size((long *)PHYS_SDRAM_2, PHYS_SDRAM_2_SIZE)
+ + get_ram_size((long *)PHYS_SDRAM_3, PHYS_SDRAM_3_SIZE)
+ + get_ram_size((long *)PHYS_SDRAM_4, PHYS_SDRAM_4_SIZE)
+ + get_ram_size((long *)PHYS_SDRAM_5, PHYS_SDRAM_7_SIZE)
+ + get_ram_size((long *)PHYS_SDRAM_6, PHYS_SDRAM_7_SIZE)
+ + get_ram_size((long *)PHYS_SDRAM_7, PHYS_SDRAM_7_SIZE)
+ + get_ram_size((long *)PHYS_SDRAM_8, PHYS_SDRAM_8_SIZE);
+ return 0;
+}
+
+void dram_init_banksize(void)
+{
+ gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
+ gd->bd->bi_dram[0].size = get_ram_size((long *)PHYS_SDRAM_1,
+ PHYS_SDRAM_1_SIZE);
+ gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
+ gd->bd->bi_dram[1].size = get_ram_size((long *)PHYS_SDRAM_2,
+ PHYS_SDRAM_2_SIZE);
+ gd->bd->bi_dram[2].start = PHYS_SDRAM_3;
+ gd->bd->bi_dram[2].size = get_ram_size((long *)PHYS_SDRAM_3,
+ PHYS_SDRAM_3_SIZE);
+ gd->bd->bi_dram[3].start = PHYS_SDRAM_4;
+ gd->bd->bi_dram[3].size = get_ram_size((long *)PHYS_SDRAM_4,
+ PHYS_SDRAM_4_SIZE);
+ gd->bd->bi_dram[4].start = PHYS_SDRAM_5;
+ gd->bd->bi_dram[4].size = get_ram_size((long *)PHYS_SDRAM_5,
+ PHYS_SDRAM_5_SIZE);
+ gd->bd->bi_dram[5].start = PHYS_SDRAM_6;
+ gd->bd->bi_dram[5].size = get_ram_size((long *)PHYS_SDRAM_6,
+ PHYS_SDRAM_6_SIZE);
+ gd->bd->bi_dram[6].start = PHYS_SDRAM_7;
+ gd->bd->bi_dram[6].size = get_ram_size((long *)PHYS_SDRAM_7,
+ PHYS_SDRAM_7_SIZE);
+ gd->bd->bi_dram[7].start = PHYS_SDRAM_8;
+ gd->bd->bi_dram[7].size = get_ram_size((long *)PHYS_SDRAM_8,
+ PHYS_SDRAM_8_SIZE);
+}
+
+static int decode_sromc(const void *blob, struct fdt_sromc *config)
+{
+ int err;
+ int node;
+
+ node = fdtdec_next_compatible(blob, 0, COMPAT_SAMSUNG_EXYNOS5_SROMC);
+ if (node < 0) {
+ debug("Could not find SROMC node\n");
+ return node;
+ }
+
+ config->bank = fdtdec_get_int(blob, node, "bank", 0);
+ config->width = fdtdec_get_int(blob, node, "width", 2);
+
+ err = fdtdec_get_int_array(blob, node, "srom-timing", config->timing,
+ FDT_SROM_TIMING_COUNT);
+ if (err < 0) {
+ debug("Could not decode SROMC configuration\n");
+ return -FDT_ERR_NOTFOUND;
+ }
+
+ return 0;
+}
+
+int board_eth_init(bd_t *bis)
+{
+#ifdef CONFIG_SMC911X
+ u32 smc_bw_conf, smc_bc_conf;
+ struct fdt_sromc config;
+ fdt_addr_t base_addr;
+ int node;
+
+ node = decode_sromc(gd->fdt_blob, &config);
+ if (node < 0) {
+ debug("%s: Could not find sromc configuration\n", __func__);
+ return 0;
+ }
+ node = fdtdec_next_compatible(gd->fdt_blob, node, COMPAT_SMSC_LAN9215);
+ if (node < 0) {
+ debug("%s: Could not find lan9215 configuration\n", __func__);
+ return 0;
+ }
+
+ /* We now have a node, so any problems from now on are errors */
+ base_addr = fdtdec_get_addr(gd->fdt_blob, node, "reg");
+ if (base_addr == FDT_ADDR_T_NONE) {
+ debug("%s: Could not find lan9215 address\n", __func__);
+ return -1;
+ }
+
+ /* Ethernet needs data bus width of 16 bits */
+ if (config.width != 2) {
+ debug("%s: Unsupported bus width %d\n", __func__,
+ config.width);
+ return -1;
+ }
+ smc_bw_conf = SROMC_DATA16_WIDTH(config.bank)
+ | SROMC_BYTE_ENABLE(config.bank);
+
+ smc_bc_conf = SROMC_BC_TACS(config.timing[FDT_SROM_TACS]) |\
+ SROMC_BC_TCOS(config.timing[FDT_SROM_TCOS]) |\
+ SROMC_BC_TACC(config.timing[FDT_SROM_TACC]) |\
+ SROMC_BC_TCOH(config.timing[FDT_SROM_TCOH]) |\
+ SROMC_BC_TAH(config.timing[FDT_SROM_TAH]) |\
+ SROMC_BC_TACP(config.timing[FDT_SROM_TACP]) |\
+ SROMC_BC_PMC(config.timing[FDT_SROM_PMC]);
+
+ /* Select and configure the SROMC bank */
+ exynos_pinmux_config(PERIPH_ID_SROMC, config.bank);
+ s5p_config_sromc(config.bank, smc_bw_conf, smc_bc_conf);
+ return smc911x_initialize(0, base_addr);
+#endif
+ return 0;
+}
+
+#ifdef CONFIG_DISPLAY_BOARDINFO
+int checkboard(void)
+{
+ printf("\nBoard: SMDK5250\n");
+
+ return 0;
+}
+#endif
+
+#ifdef CONFIG_GENERIC_MMC
+int board_mmc_init(bd_t *bis)
+{
+ int ret = 0;
+
+ /* dwmmc initializattion for available channels */
+ ret = exynos_dwmmc_init(gd->fdt_blob);
+ if (ret)
+ debug("dwmmc init failed\n");
+
+ return ret;
+}
+#endif
+
+static int board_uart_init(void)
+{
+ int err;
+
+ err = exynos_pinmux_config(PERIPH_ID_UART0, PINMUX_FLAG_NONE);
+ if (err) {
+ debug("UART0 not configured\n");
+ return err;
+ }
+
+ err = exynos_pinmux_config(PERIPH_ID_UART1, PINMUX_FLAG_NONE);
+ if (err) {
+ debug("UART1 not configured\n");
+ return err;
+ }
+
+ err = exynos_pinmux_config(PERIPH_ID_UART2, PINMUX_FLAG_NONE);
+ if (err) {
+ debug("UART2 not configured\n");
+ return err;
+ }
+
+ err = exynos_pinmux_config(PERIPH_ID_UART3, PINMUX_FLAG_NONE);
+ if (err) {
+ debug("UART3 not configured\n");
+ return err;
+ }
+
+ return 0;
+}
+
+#ifdef CONFIG_BOARD_EARLY_INIT_F
+int board_early_init_f(void)
+{
+ int err;
+ err = board_uart_init();
+ if (err) {
+ debug("UART init failed\n");
+ return err;
+ }
+#ifdef CONFIG_SYS_I2C_INIT_BOARD
+ board_i2c_init(gd->fdt_blob);
+#endif
+ return err;
+}
+#endif
@@ -27,6 +27,7 @@
#include <netdev.h>
#include <spi.h>
#include <asm/arch/cpu.h>
+#include <asm/arch/dwmmc.h>
#include <asm/arch/gpio.h>
#include <asm/arch/mmc.h>
#include <asm/arch/pinmux.h>
@@ -88,32 +89,6 @@ void dram_init_banksize(void)
PHYS_SDRAM_8_SIZE);
}
-#ifdef CONFIG_OF_CONTROL
-static int decode_sromc(const void *blob, struct fdt_sromc *config)
-{
- int err;
- int node;
-
- node = fdtdec_next_compatible(blob, 0, COMPAT_SAMSUNG_EXYNOS5_SROMC);
- if (node < 0) {
- debug("Could not find SROMC node\n");
- return node;
- }
-
- config->bank = fdtdec_get_int(blob, node, "bank", 0);
- config->width = fdtdec_get_int(blob, node, "width", 2);
-
- err = fdtdec_get_int_array(blob, node, "srom-timing", config->timing,
- FDT_SROM_TIMING_COUNT);
- if (err < 0) {
- debug("Could not decode SROMC configuration\n");
- return -FDT_ERR_NOTFOUND;
- }
-
- return 0;
-}
-#endif
-
int board_eth_init(bd_t *bis)
{
#ifdef CONFIG_SMC911X
@@ -122,25 +97,6 @@ int board_eth_init(bd_t *bis)
fdt_addr_t base_addr;
int node;
-#ifdef CONFIG_OF_CONTROL
- node = decode_sromc(gd->fdt_blob, &config);
- if (node < 0) {
- debug("%s: Could not find sromc configuration\n", __func__);
- return 0;
- }
- node = fdtdec_next_compatible(gd->fdt_blob, node, COMPAT_SMSC_LAN9215);
- if (node < 0) {
- debug("%s: Could not find lan9215 configuration\n", __func__);
- return 0;
- }
-
- /* We now have a node, so any problems from now on are errors */
- base_addr = fdtdec_get_addr(gd->fdt_blob, node, "reg");
- if (base_addr == FDT_ADDR_T_NONE) {
- debug("%s: Could not find lan9215 address\n", __func__);
- return -1;
- }
-#else
/* Non-FDT configuration - bank number and timing parameters*/
config.bank = CONFIG_ENV_SROM_BANK;
config.width = 2;
@@ -153,7 +109,6 @@ int board_eth_init(bd_t *bis)
config.timing[FDT_SROM_TACP] = 0x09;
config.timing[FDT_SROM_PMC] = 0x01;
base_addr = CONFIG_SMC911X_BASE;
-#endif
/* Ethernet needs data bus width of 16 bits */
if (config.width != 2) {
@@ -192,16 +147,31 @@ int checkboard(void)
#ifdef CONFIG_GENERIC_MMC
int board_mmc_init(bd_t *bis)
{
- int err;
+ int err = 0, ret = 0;
err = exynos_pinmux_config(PERIPH_ID_SDMMC0, PINMUX_FLAG_8BIT_MODE);
- if (err) {
+ if (err)
debug("SDMMC0 not configured\n");
- return err;
- }
-
- err = s5p_mmc_init(0, 8);
- return err;
+ ret |= err;
+
+ /*EMMC: dwmmc Channel-0 with 8 bit bus width */
+ err = exynos_dwmmc_init(0, 8);
+ if (err)
+ debug("dwmmc Channel-0 init failed\n");
+ ret |= err;
+
+ err = exynos_pinmux_config(PERIPH_ID_SDMMC2, PINMUX_FLAG_NONE);
+ if (err)
+ debug("SDMMC2 not configured\n");
+ ret |= err;
+
+ /*SD: dwmmc Channel-2 with 4 bit bus width */
+ err = exynos_dwmmc_init(2, 4);
+ if (err)
+ debug("dwmmc Channel-2 init failed\n");
+ ret |= err;
+
+ return ret;
}
#endif
@@ -84,6 +84,8 @@
#define CONFIG_MMC
#define CONFIG_SDHCI
#define CONFIG_S5P_SDHCI
+#define CONFIG_DWMMC
+#define CONFIG_EXYNOS_DWMMC
#define CONFIG_BOARD_EARLY_INIT_F
This patch enables DWMMC for SMDK5250. Supports both dt and non-dt versions. Two files are maintained, one for dt version(smdk5250.c) and the other for non-dt version(exynos5-dt.c). Signed-off-by: Amar <amarendra.xt@samsung.com> --- board/samsung/smdk5250/Makefile | 4 + board/samsung/smdk5250/exynos5-dt.c | 235 ++++++++++++++++++++++++++++++++++++ board/samsung/smdk5250/smdk5250.c | 76 ++++-------- include/configs/exynos5250-dt.h | 2 + 4 files changed, 264 insertions(+), 53 deletions(-) create mode 100644 board/samsung/smdk5250/exynos5-dt.c