@@ -85,6 +85,10 @@ [PcdsFeatureFlag.common]
# Define if the GICv3 controller should use the GICv2 legacy
gArmTokenSpaceGuid.PcdArmGicV3WithV2Legacy|FALSE|BOOLEAN|0x00000042
+ # Whether to implement warm reboot for capsule update using a jump back to the
+ # PEI entry point with caches and interrupts disabled.
+ gArmTokenSpaceGuid.PcdArmReenterPeiForCapsuleWarmReboot|FALSE|BOOLEAN|0x0000001F
+
[PcdsFeatureFlag.ARM]
# Whether to map normal memory as non-shareable. FALSE is the safe choice, but
# TRUE may be appropriate to fix performance problems if you don't care about
@@ -15,10 +15,13 @@
#include <PiDxe.h>
+#include <Library/ArmMmuLib.h>
+#include <Library/ArmSmcLib.h>
#include <Library/BaseLib.h>
#include <Library/DebugLib.h>
#include <Library/ResetSystemLib.h>
-#include <Library/ArmSmcLib.h>
+#include <Library/UefiBootServicesTableLib.h>
+#include <Library/UefiRuntimeLib.h>
#include <IndustryStandard/ArmStdSmc.h>
@@ -89,7 +92,21 @@ EnterS3WithImmediateWake (
VOID
)
{
- // Not implemented
+ VOID (*Reset)(VOID);
+
+ if (FeaturePcdGet (PcdArmReenterPeiForCapsuleWarmReboot) &&
+ !EfiAtRuntime ()) {
+ //
+ // At boot time, we are the only core running, so we can implement the
+ // immediate wake (which is used by capsule update) by disabling the MMU
+ // and interrupts, and jumping to the PEI entry point.
+ //
+ Reset = (VOID (*)(VOID))(UINTN)FixedPcdGet64 (PcdFvBaseAddress);
+
+ gBS->RaiseTPL (TPL_HIGH_LEVEL);
+ ArmDisableMmu ();
+ Reset ();
+ }
}
/**
@@ -30,6 +30,15 @@ [Packages]
MdePkg/MdePkg.dec
[LibraryClasses]
+ ArmMmuLib
ArmSmcLib
BaseLib
DebugLib
+ UefiBootServicesTableLib
+ UefiRuntimeLib
+
+[FeaturePcd]
+ gArmTokenSpaceGuid.PcdArmReenterPeiForCapsuleWarmReboot
+
+[FixedPcd]
+ gArmTokenSpaceGuid.PcdFvBaseAddress