diff mbox series

[RISU,v4,21/22] risu_reginfo_aarch64: limit SVE_VQ_MAX to current architecture

Message ID 20180622141205.16306-22-alex.bennee@linaro.org
State New
Headers show
Series ARM SVE support for RISU | expand

Commit Message

Alex Bennée June 22, 2018, 2:12 p.m. UTC 
From: Richard Henderson <richard.henderson@linaro.org>


The kernel headers optimistically assume it's going to grow but as we
are never going to use that many on current hardware we limit
SVE_VQ_MAX to what we will.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>

---
 risu_reginfo_aarch64.h | 5 +++++
 1 file changed, 5 insertions(+)

-- 
2.17.1
diff mbox series

Patch

diff --git a/risu_reginfo_aarch64.h b/risu_reginfo_aarch64.h
index b3701b3..c33b86f 100644
--- a/risu_reginfo_aarch64.h
+++ b/risu_reginfo_aarch64.h
@@ -31,6 +31,11 @@  struct sve_reginfo {
 };
 #endif
 
+/* The kernel headers set this based on future arch extensions.
+   The current arch maximum is 16.  Save space below.  */
+#undef SVE_VQ_MAX
+#define SVE_VQ_MAX 16
+
 struct reginfo {
     uint64_t fault_address;
     uint64_t regs[31];