[PATCHv5,13/21] arm64: zero GPRs upon entry from EL0

Message ID	20180711135656.20670-14-mark.rutland@arm.com
State	New
Headers	show Delivered-To: patch@linaro.org Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; From: Mark Rutland <mark.rutland@arm.com> To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, will.deacon@arm.com Cc: catalin.marinas@arm.com, dave.martin@arm.com, hch@infradead.org, james.morse@arm.com, linux@dominikbrodowski.net, linux-fsdevel@vger.kernel.org, marc.zyngier@arm.com, mark.rutland@arm.com, viro@zeniv.linux.org.uk Subject: [PATCHv5 13/21] arm64: zero GPRs upon entry from EL0 Date: Wed, 11 Jul 2018 14:56:48 +0100 Message-Id: <20180711135656.20670-14-mark.rutland@arm.com> In-Reply-To: <20180711135656.20670-1-mark.rutland@arm.com> References: <20180711135656.20670-1-mark.rutland@arm.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk
Series	arm64: invoke syscalls with pt_regs \| expand [PATCHv5,00/21] arm64: invoke syscalls with pt_regs [PATCHv5,01/21] arm64: consistently use unsigned long for thread flags [PATCHv5,02/21] arm64: move SCTLR_EL{1,2} assertions to <asm/sysreg.h> [PATCHv5,03/21] arm64: kill config_sctlr_el1() [PATCHv5,04/21] arm64: kill change_cpacr() [PATCHv5,05/21] arm64: move sve_user_{enable,disable} to <asm/fpsimd.h> [PATCHv5,06/21] arm64: remove sigreturn wrappers [PATCHv5,07/21] arm64: introduce syscall_fn_t [PATCHv5,08/21] arm64: convert raw syscall invocation to C [PATCHv5,09/21] arm64: convert syscall trace logic to C [PATCHv5,10/21] arm64: convert native/compat syscall entry to C [PATCHv5,11/21] arm64: don't restore GPRs when context tracking [PATCHv5,12/21] arm64: don't reload GPRs after apply_ssbd [PATCHv5,13/21] arm64: zero GPRs upon entry from EL0 [PATCHv5,14/21] arm64: drop alignment from syscall tables [PATCHv5,15/21] kernel: add ksys_personality() [PATCHv5,16/21] kernel: add kcompat_sys_{f,}statfs64() [PATCHv5,17/21] arm64: remove in-kernel call to sys_personality() [PATCHv5,18/21] arm64: use {COMPAT,}SYSCALL_DEFINE0 for sigreturn [PATCHv5,19/21] arm64: use SYSCALL_DEFINE6() for mmap [PATCHv5,20/21] arm64: convert compat wrappers to C [PATCHv5,21/21] arm64: implement syscall wrappers

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20180711135656.20670-14-mark.rutland@arm.com

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New

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Received-SPF: pass (google.com: best guess record for domain of
	linux-kernel-owner@vger.kernel.org designates 209.132.180.67
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From: Mark Rutland <mark.rutland@arm.com>
To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org,
	will.deacon@arm.com
Cc: catalin.marinas@arm.com, dave.martin@arm.com, hch@infradead.org,
	james.morse@arm.com, linux@dominikbrodowski.net,
	linux-fsdevel@vger.kernel.org, marc.zyngier@arm.com,
	mark.rutland@arm.com, viro@zeniv.linux.org.uk
Subject: [PATCHv5 13/21] arm64: zero GPRs upon entry from EL0
Date: Wed, 11 Jul 2018 14:56:48 +0100
Message-Id: <20180711135656.20670-14-mark.rutland@arm.com>
In-Reply-To: <20180711135656.20670-1-mark.rutland@arm.com>
References: <20180711135656.20670-1-mark.rutland@arm.com>
Sender: linux-kernel-owner@vger.kernel.org
Precedence: bulk

Series

arm64: invoke syscalls with pt_regs | expand

Commit Message

Mark Rutland July 11, 2018, 1:56 p.m. UTC

We can zero GPRs x0 - x29 upon entry from EL0 to make it harder for
userspace to control values consumed by speculative gadgets.

We don't blat x30, since this is stashed much later, and we'll blat it
before invoking C code.

Signed-off-by: Mark Rutland <mark.rutland@arm.com>

Acked-by: Catalin Marinas <catalin.marinas@arm.com>

Cc: Will Deacon <will.deacon@arm.com>
---
 arch/arm64/kernel/entry.S | 8 +++++++-
 1 file changed, 7 insertions(+), 1 deletion(-)

-- 
2.11.0

diff --git a/arch/arm64/kernel/entry.S b/arch/arm64/kernel/entry.S
index 22b240da949b..d1440f84668b 100644
--- a/arch/arm64/kernel/entry.S
+++ b/arch/arm64/kernel/entry.S
@@ -53,6 +53,12 @@ 
 #endif
 	.endm
 
+	.macro	clear_gp_regs
+	.irp	n,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29
+	mov	x\n, xzr
+	.endr
+	.endm
+
 /*
  * Bad Abort numbers
  *-----------------
@@ -169,6 +175,7 @@  alternative_cb_end
 	stp	x28, x29, [sp, #16 * 14]
 
 	.if	\el == 0
+	clear_gp_regs
 	mrs	x21, sp_el0
 	ldr_this_cpu	tsk, __entry_task, x20	// Ensure MDSCR_EL1.SS is clear,
 	ldr	x19, [tsk, #TSK_TI_FLAGS]	// since we can unmask debug
@@ -176,7 +183,6 @@  alternative_cb_end
 
 	apply_ssbd 1, x22, x23
 
-	mov	x29, xzr			// fp pointed to user-space
 	.else
 	add	x21, sp, #S_FRAME_SIZE
 	get_thread_info tsk

[PATCHv5,13/21] arm64: zero GPRs upon entry from EL0

Commit Message

Patch