[edk2,edk2-platforms,2/2] Silicon/SynQuacer: Add status property in PCIe & SDHC DT nodes

Message ID 1533278495-25323-3-git-send-email-sumit.garg@linaro.org
State New
Headers show
Series
  • Silicon/SynQuacer: update Device Tree
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Commit Message

Sumit Garg Aug. 3, 2018, 6:41 a.m.
Add status = "disabled" property by default for PCIe and SDHC DT nodes.
If required, update them at runtime with status = "okay". Using this
method we don't need extra DTB_PADDING.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Sumit Garg <sumit.garg@linaro.org>

Cc: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>

---
 .../Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi  |  3 ++
 .../SynQuacerDtbLoaderLib/SynQuacerDtbLoaderLib.c  | 40 ++++------------------
 2 files changed, 10 insertions(+), 33 deletions(-)

-- 
2.7.4

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Patch

diff --git a/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi b/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi
index d6a5f013e58c..003e21bd6f85 100644
--- a/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi
+++ b/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi
@@ -473,6 +473,7 @@ 
 
         msi-map = <0x000 &its 0x0 0x7f00>;
         dma-coherent;
+        status = "disabled";
     };
 
     pcie1: pcie@70000000 {
@@ -492,6 +493,7 @@ 
 
         msi-map = <0x0 &its 0x10000 0x7f00>;
         dma-coherent;
+        status = "disabled";
     };
 
     gpio: gpio@51000000 {
@@ -537,6 +539,7 @@ 
         clocks = <&clk_alw_c_0 &clk_alw_b_0>;
         clock-names = "core", "iface";
         dma-coherent;
+        status = "disabled";
     };
 
     clk_alw_1_8: spi_ihclk {
diff --git a/Silicon/Socionext/SynQuacer/Library/SynQuacerDtbLoaderLib/SynQuacerDtbLoaderLib.c b/Silicon/Socionext/SynQuacer/Library/SynQuacerDtbLoaderLib/SynQuacerDtbLoaderLib.c
index 77db30c204fe..96090c20502c 100644
--- a/Silicon/Socionext/SynQuacer/Library/SynQuacerDtbLoaderLib/SynQuacerDtbLoaderLib.c
+++ b/Silicon/Socionext/SynQuacer/Library/SynQuacerDtbLoaderLib/SynQuacerDtbLoaderLib.c
@@ -22,32 +22,6 @@ 
 #include <Library/OpteeLib.h>
 #include <Platform/VarStore.h>
 
-// add enough space for three instances of 'status = "disabled"'
-#define DTB_PADDING               64
-
-STATIC
-VOID
-DisableDtNode (
-  IN  VOID                        *Dtb,
-  IN  CONST CHAR8                 *NodePath
-  )
-{
-  INT32                           Node;
-  INT32                           Rc;
-
-  Node = fdt_path_offset (Dtb, NodePath);
-  if (Node < 0) {
-    DEBUG ((DEBUG_ERROR, "%a: failed to locate DT path '%a': %a\n",
-      __FUNCTION__, NodePath, fdt_strerror (Node)));
-    return;
-  }
-  Rc = fdt_setprop_string (Dtb, Node, "status", "disabled");
-  if (Rc < 0) {
-    DEBUG ((DEBUG_ERROR, "%a: failed to set status to 'disabled' on '%a': %a\n",
-      __FUNCTION__, NodePath, fdt_strerror (Rc)));
-  }
-}
-
 STATIC
 VOID
 EnableDtNode (
@@ -105,7 +79,7 @@  DtPlatformLoadDtb (
     return EFI_NOT_FOUND;
   }
 
-  CopyDtbSize = OrigDtbSize + DTB_PADDING;
+  CopyDtbSize = OrigDtbSize;
   CopyDtb = AllocatePool (CopyDtbSize);
   if (CopyDtb == NULL) {
     return EFI_OUT_OF_RESOURCES;
@@ -118,17 +92,17 @@  DtPlatformLoadDtb (
     return EFI_NOT_FOUND;
   }
 
-  if (!(PcdGet8 (PcdPcieEnableMask) & BIT0)) {
-    DisableDtNode (CopyDtb, "/pcie@60000000");
+  if (PcdGet8 (PcdPcieEnableMask) & BIT0) {
+    EnableDtNode (CopyDtb, "/pcie@60000000");
   }
-  if (!(PcdGet8 (PcdPcieEnableMask) & BIT1)) {
-    DisableDtNode (CopyDtb, "/pcie@70000000");
+  if (PcdGet8 (PcdPcieEnableMask) & BIT1) {
+    EnableDtNode (CopyDtb, "/pcie@70000000");
   }
 
   SettingsVal = PcdGet64 (PcdPlatformSettings);
   Settings = (SYNQUACER_PLATFORM_VARSTORE_DATA *)&SettingsVal;
-  if (Settings->EnableEmmc == EMMC_DISABLED) {
-    DisableDtNode (CopyDtb, "/sdhci@52300000");
+  if (Settings->EnableEmmc == EMMC_ENABLED) {
+    EnableDtNode (CopyDtb, "/sdhci@52300000");
   }
 
   if (IsOpteePresent()) {