diff mbox series

[01/10] target/arm: Correct typo in HAMAIR1 regdef name

Message ID 20180814124254.5229-2-peter.maydell@linaro.org
State Superseded
Headers show
Series target/arm: Some pieces of support for 32-bit Hyp mode | expand

Commit Message

Peter Maydell Aug. 14, 2018, 12:42 p.m. UTC
We implement the HAMAIR1 register as RAZ/WI; we had a typo in the
regdef, though, and were incorrectly naming it HMAIR1 (which is
a different register which we also implement as RAZ/WI).

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

---
 target/arm/helper.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

-- 
2.18.0

Comments

Edgar E. Iglesias Aug. 14, 2018, 2:33 p.m. UTC | #1
On Tue, Aug 14, 2018 at 01:42:45PM +0100, Peter Maydell wrote:
> We implement the HAMAIR1 register as RAZ/WI; we had a typo in the

> regdef, though, and were incorrectly naming it HMAIR1 (which is

> a different register which we also implement as RAZ/WI).

> 

> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>



> ---

>  target/arm/helper.c | 4 ++--

>  1 file changed, 2 insertions(+), 2 deletions(-)

> 

> diff --git a/target/arm/helper.c b/target/arm/helper.c

> index 8b07bf214ec..2c5e02c0b1a 100644

> --- a/target/arm/helper.c

> +++ b/target/arm/helper.c

> @@ -3773,7 +3773,7 @@ static const ARMCPRegInfo el3_no_el2_cp_reginfo[] = {

>        .opc0 = 3, .opc1 = 4, .crn = 10, .crm = 3, .opc2 = 0,

>        .access = PL2_RW, .type = ARM_CP_CONST,

>        .resetvalue = 0 },

> -    { .name = "HMAIR1", .state = ARM_CP_STATE_AA32,

> +    { .name = "HAMAIR1", .state = ARM_CP_STATE_AA32,

>        .opc1 = 4, .crn = 10, .crm = 3, .opc2 = 1,

>        .access = PL2_RW, .type = ARM_CP_CONST,

>        .resetvalue = 0 },

> @@ -3925,7 +3925,7 @@ static const ARMCPRegInfo el2_cp_reginfo[] = {

>        .access = PL2_RW, .type = ARM_CP_CONST,

>        .resetvalue = 0 },

>      /* HAMAIR1 is mapped to AMAIR_EL2[63:32] */

> -    { .name = "HMAIR1", .state = ARM_CP_STATE_AA32,

> +    { .name = "HAMAIR1", .state = ARM_CP_STATE_AA32,

>        .opc1 = 4, .crn = 10, .crm = 3, .opc2 = 1,

>        .access = PL2_RW, .type = ARM_CP_CONST,

>        .resetvalue = 0 },

> -- 

> 2.18.0

>
Luc Michel Aug. 15, 2018, 9:02 a.m. UTC | #2
On 8/14/18 2:42 PM, Peter Maydell wrote:
> We implement the HAMAIR1 register as RAZ/WI; we had a typo in the

> regdef, though, and were incorrectly naming it HMAIR1 (which is

> a different register which we also implement as RAZ/WI).

> 

> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


Reviewed-By: Luc Michel <luc.michel@greensocs.com>
diff mbox series

Patch

diff --git a/target/arm/helper.c b/target/arm/helper.c
index 8b07bf214ec..2c5e02c0b1a 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -3773,7 +3773,7 @@  static const ARMCPRegInfo el3_no_el2_cp_reginfo[] = {
       .opc0 = 3, .opc1 = 4, .crn = 10, .crm = 3, .opc2 = 0,
       .access = PL2_RW, .type = ARM_CP_CONST,
       .resetvalue = 0 },
-    { .name = "HMAIR1", .state = ARM_CP_STATE_AA32,
+    { .name = "HAMAIR1", .state = ARM_CP_STATE_AA32,
       .opc1 = 4, .crn = 10, .crm = 3, .opc2 = 1,
       .access = PL2_RW, .type = ARM_CP_CONST,
       .resetvalue = 0 },
@@ -3925,7 +3925,7 @@  static const ARMCPRegInfo el2_cp_reginfo[] = {
       .access = PL2_RW, .type = ARM_CP_CONST,
       .resetvalue = 0 },
     /* HAMAIR1 is mapped to AMAIR_EL2[63:32] */
-    { .name = "HMAIR1", .state = ARM_CP_STATE_AA32,
+    { .name = "HAMAIR1", .state = ARM_CP_STATE_AA32,
       .opc1 = 4, .crn = 10, .crm = 3, .opc2 = 1,
       .access = PL2_RW, .type = ARM_CP_CONST,
       .resetvalue = 0 },