| Message ID | 1537171879-64390-1-git-send-email-gavin.hu@arm.com |
|---|---|
| State | New |
| Headers | show |
| Series | [v4,1/4] bus/fslmc: fix undefined reference of memsegs | expand |
-----Original Message----- > Date: Mon, 17 Sep 2018 16:11:17 +0800 > From: Gavin Hu <gavin.hu@arm.com> > To: dev@dpdk.org > CC: gavin.hu@arm.com, Honnappa.Nagarahalli@arm.com, steve.capper@arm.com, > Ola.Liljedahl@arm.com, jerin.jacob@caviumnetworks.com, nd@arm.com, > stable@dpdk.org > Subject: [PATCH v4 2/4] ring: read tail using atomic load > X-Mailer: git-send-email 2.7.4 > > > In update_tail, read ht->tail using __atomic_load.Although the > compiler currently seems to be doing the right thing even without > _atomic_load, we don't want to give the compiler freedom to optimise > what should be an atomic load, it should not be arbitarily moved > around. > > Fixes: 39368ebfc6 ("ring: introduce C11 memory model barrier option") > Cc: stable@dpdk.org + Jia He <jia.he@hxt-semitech.com> > > Signed-off-by: Gavin Hu <gavin.hu@arm.com> > Reviewed-by: Honnappa Nagarahalli <Honnappa.Nagarahalli@arm.com> > Reviewed-by: Steve Capper <steve.capper@arm.com> > Reviewed-by: Ola Liljedahl <Ola.Liljedahl@arm.com> > --- > lib/librte_ring/rte_ring_c11_mem.h | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/lib/librte_ring/rte_ring_c11_mem.h b/lib/librte_ring/rte_ring_c11_mem.h > index 94df3c4..234fea0 100644 > --- a/lib/librte_ring/rte_ring_c11_mem.h > +++ b/lib/librte_ring/rte_ring_c11_mem.h > @@ -21,7 +21,8 @@ update_tail(struct rte_ring_headtail *ht, uint32_t old_val, uint32_t new_val, > * we need to wait for them to complete > */ > if (!single) > - while (unlikely(ht->tail != old_val)) > + while (unlikely(old_val != __atomic_load_n(&ht->tail, > + __ATOMIC_RELAXED))) > rte_pause(); > > __atomic_store_n(&ht->tail, new_val, __ATOMIC_RELEASE); > -- > 2.7.4 >
+ Justin He as Jerin requested. > -----Original Message----- > From: Jerin Jacob <jerin.jacob@caviumnetworks.com> > Sent: Thursday, September 20, 2018 2:41 PM > To: Gavin Hu (Arm Technology China) <Gavin.Hu@arm.com> > Cc: dev@dpdk.org; Honnappa Nagarahalli > <Honnappa.Nagarahalli@arm.com>; Steve Capper > <Steve.Capper@arm.com>; Ola Liljedahl <Ola.Liljedahl@arm.com>; nd > <nd@arm.com>; stable@dpdk.org; jia.he@hxt-semitech.com > Subject: Re: [PATCH v4 2/4] ring: read tail using atomic load > > -----Original Message----- > > Date: Mon, 17 Sep 2018 16:11:17 +0800 > > From: Gavin Hu <gavin.hu@arm.com> > > To: dev@dpdk.org > > CC: gavin.hu@arm.com, Honnappa.Nagarahalli@arm.com, > > steve.capper@arm.com, Ola.Liljedahl@arm.com, > > jerin.jacob@caviumnetworks.com, nd@arm.com, stable@dpdk.org > > Subject: [PATCH v4 2/4] ring: read tail using atomic load > > X-Mailer: git-send-email 2.7.4 > > > > > > In update_tail, read ht->tail using __atomic_load.Although the > > compiler currently seems to be doing the right thing even without > > _atomic_load, we don't want to give the compiler freedom to optimise > > what should be an atomic load, it should not be arbitarily moved > > around. > > > > Fixes: 39368ebfc6 ("ring: introduce C11 memory model barrier option") > > Cc: stable@dpdk.org > > > + Jia He <jia.he@hxt-semitech.com> > > > > > Signed-off-by: Gavin Hu <gavin.hu@arm.com> > > Reviewed-by: Honnappa Nagarahalli <Honnappa.Nagarahalli@arm.com> > > Reviewed-by: Steve Capper <steve.capper@arm.com> > > Reviewed-by: Ola Liljedahl <Ola.Liljedahl@arm.com> > > --- > > lib/librte_ring/rte_ring_c11_mem.h | 3 ++- > > 1 file changed, 2 insertions(+), 1 deletion(-) > > > > diff --git a/lib/librte_ring/rte_ring_c11_mem.h > > b/lib/librte_ring/rte_ring_c11_mem.h > > index 94df3c4..234fea0 100644 > > --- a/lib/librte_ring/rte_ring_c11_mem.h > > +++ b/lib/librte_ring/rte_ring_c11_mem.h > > @@ -21,7 +21,8 @@ update_tail(struct rte_ring_headtail *ht, uint32_t > old_val, uint32_t new_val, > > * we need to wait for them to complete > > */ > > if (!single) > > - while (unlikely(ht->tail != old_val)) > > + while (unlikely(old_val != __atomic_load_n(&ht->tail, > > + __ATOMIC_RELAXED))) > > rte_pause(); > > > > __atomic_store_n(&ht->tail, new_val, __ATOMIC_RELEASE); > > -- > > 2.7.4 > >
17/09/2018 10:11, Gavin Hu: > In __rte_ring_move_prod_head, move the __atomic_load_n up and out of > the do {} while loop as upon failure the old_head will be updated, > another load is costly and not necessary. > > This helps a little on the latency,about 1~5%. > > Test result with the patch(two cores): > SP/SC bulk enq/dequeue (size: 8): 5.64 > MP/MC bulk enq/dequeue (size: 8): 9.58 > SP/SC bulk enq/dequeue (size: 32): 1.98 > MP/MC bulk enq/dequeue (size: 32): 2.30 > > Fixes: 39368ebfc6 ("ring: introduce C11 memory model barrier option") > Cc: stable@dpdk.org > > Signed-off-by: Gavin Hu <gavin.hu@arm.com> > Reviewed-by: Honnappa Nagarahalli <Honnappa.Nagarahalli@arm.com> > Reviewed-by: Steve Capper <steve.capper@arm.com> > Reviewed-by: Ola Liljedahl <Ola.Liljedahl@arm.com> We are missing reviews and acknowledgements on this series.
diff --git a/drivers/bus/fslmc/portal/dpaa2_hw_dpbp.c b/drivers/bus/fslmc/portal/dpaa2_hw_dpbp.c index 39c5adf..db49d63 100644 --- a/drivers/bus/fslmc/portal/dpaa2_hw_dpbp.c +++ b/drivers/bus/fslmc/portal/dpaa2_hw_dpbp.c @@ -28,6 +28,13 @@ #include "portal/dpaa2_hw_pvt.h" #include "portal/dpaa2_hw_dpio.h" +/* List of all the memseg information locally maintained in dpaa2 driver. This + * is to optimize the PA_to_VA searches until a better mechanism (algo) is + * available. + */ +struct dpaa2_memseg_list rte_dpaa2_memsegs + = TAILQ_HEAD_INITIALIZER(rte_dpaa2_memsegs); + TAILQ_HEAD(dpbp_dev_list, dpaa2_dpbp_dev); static struct dpbp_dev_list dpbp_dev_list = TAILQ_HEAD_INITIALIZER(dpbp_dev_list); /*!< DPBP device list */ diff --git a/drivers/bus/fslmc/rte_bus_fslmc_version.map b/drivers/bus/fslmc/rte_bus_fslmc_version.map index fe45a11..b4a8817 100644 --- a/drivers/bus/fslmc/rte_bus_fslmc_version.map +++ b/drivers/bus/fslmc/rte_bus_fslmc_version.map @@ -114,5 +114,6 @@ DPDK_18.05 { dpdmai_open; dpdmai_set_rx_queue; rte_dpaa2_free_dpci_dev; + rte_dpaa2_memsegs; } DPDK_18.02; diff --git a/drivers/mempool/dpaa2/dpaa2_hw_mempool.c b/drivers/mempool/dpaa2/dpaa2_hw_mempool.c index 7d0435f..84ff128 100644 --- a/drivers/mempool/dpaa2/dpaa2_hw_mempool.c +++ b/drivers/mempool/dpaa2/dpaa2_hw_mempool.c @@ -33,13 +33,6 @@ struct dpaa2_bp_info rte_dpaa2_bpid_info[MAX_BPID]; static struct dpaa2_bp_list *h_bp_list; -/* List of all the memseg information locally maintained in dpaa2 driver. This - * is to optimize the PA_to_VA searches until a better mechanism (algo) is - * available. - */ -struct dpaa2_memseg_list rte_dpaa2_memsegs - = TAILQ_HEAD_INITIALIZER(rte_dpaa2_memsegs); - /* Dynamic logging identified for mempool */ int dpaa2_logtype_mempool; diff --git a/drivers/mempool/dpaa2/rte_mempool_dpaa2_version.map b/drivers/mempool/dpaa2/rte_mempool_dpaa2_version.map index b9d996a..b45e7a9 100644 --- a/drivers/mempool/dpaa2/rte_mempool_dpaa2_version.map +++ b/drivers/mempool/dpaa2/rte_mempool_dpaa2_version.map @@ -3,7 +3,6 @@ DPDK_17.05 { rte_dpaa2_bpid_info; rte_dpaa2_mbuf_alloc_bulk; - rte_dpaa2_memsegs; local: *; };