Message ID | 20180927211322.16118-8-richard.henderson@linaro.org |
---|---|
State | Superseded |
Headers | show |
Series | target/arm: Rely on id regs instead of features | expand |
On 27/09/2018 23:13, Richard Henderson wrote: > Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> > --- > target/arm/cpu.h | 6 +++++- > linux-user/elfload.c | 2 +- > target/arm/cpu.c | 4 ---- > target/arm/helper.c | 2 +- > target/arm/machine.c | 3 +-- > 5 files changed, 8 insertions(+), 9 deletions(-) > > diff --git a/target/arm/cpu.h b/target/arm/cpu.h > index c9996d2534..da841f8538 100644 > --- a/target/arm/cpu.h > +++ b/target/arm/cpu.h > @@ -1529,7 +1529,6 @@ enum arm_features { > ARM_FEATURE_NEON, > ARM_FEATURE_M, /* Microcontroller profile. */ > ARM_FEATURE_OMAPCP, /* OMAP specific CP15 ops handling. */ > - ARM_FEATURE_THUMB2EE, > ARM_FEATURE_V7MP, /* v7 Multiprocessing Extensions */ > ARM_FEATURE_V7VE, /* v7 Virtualization Extensions (non-EL2 parts) */ > ARM_FEATURE_V4T, > @@ -3123,6 +3122,11 @@ static inline bool aa32_feature_jazelle(ARMCPU *cpu) > return FIELD_EX32(cpu->id_isar1, ID_ISAR1, JAZELLE) != 0; > } > > +static inline bool aa32_feature_t32ee(ARMCPU *cpu) > +{ > + return FIELD_EX32(cpu->id_isar3, ID_ISAR3, T32EE) != 0; > +} > + > static inline bool aa32_feature_aes(ARMCPU *cpu) > { > return FIELD_EX32(cpu->id_isar5, ID_ISAR5, AES) != 0; > diff --git a/linux-user/elfload.c b/linux-user/elfload.c > index 1ddb1fd102..01707ebb91 100644 > --- a/linux-user/elfload.c > +++ b/linux-user/elfload.c > @@ -466,7 +466,7 @@ static uint32_t get_elf_hwcap(void) > GET_FEATURE(ARM_FEATURE_V5, ARM_HWCAP_ARM_EDSP); > GET_FEATURE(ARM_FEATURE_VFP, ARM_HWCAP_ARM_VFP); > GET_FEATURE(ARM_FEATURE_IWMMXT, ARM_HWCAP_ARM_IWMMXT); > - GET_FEATURE(ARM_FEATURE_THUMB2EE, ARM_HWCAP_ARM_THUMBEE); > + GET_FEATURE_ID(t32ee, ARM_HWCAP_ARM_THUMBEE); > GET_FEATURE(ARM_FEATURE_NEON, ARM_HWCAP_ARM_NEON); > GET_FEATURE(ARM_FEATURE_VFP3, ARM_HWCAP_ARM_VFPv3); > GET_FEATURE(ARM_FEATURE_V6K, ARM_HWCAP_ARM_TLS); > diff --git a/target/arm/cpu.c b/target/arm/cpu.c > index 41a1b27c61..abb1b6fe5c 100644 > --- a/target/arm/cpu.c > +++ b/target/arm/cpu.c > @@ -1436,7 +1436,6 @@ static void cortex_a8_initfn(Object *obj) > set_feature(&cpu->env, ARM_FEATURE_V7); > set_feature(&cpu->env, ARM_FEATURE_VFP3); > set_feature(&cpu->env, ARM_FEATURE_NEON); > - set_feature(&cpu->env, ARM_FEATURE_THUMB2EE); > set_feature(&cpu->env, ARM_FEATURE_DUMMY_C15_REGS); > set_feature(&cpu->env, ARM_FEATURE_EL3); > cpu->midr = 0x410fc080; > @@ -1505,7 +1504,6 @@ static void cortex_a9_initfn(Object *obj) > set_feature(&cpu->env, ARM_FEATURE_VFP3); > set_feature(&cpu->env, ARM_FEATURE_VFP_FP16); > set_feature(&cpu->env, ARM_FEATURE_NEON); > - set_feature(&cpu->env, ARM_FEATURE_THUMB2EE); > set_feature(&cpu->env, ARM_FEATURE_EL3); > /* Note that A9 supports the MP extensions even for > * A9UP and single-core A9MP (which are both different > @@ -1568,7 +1566,6 @@ static void cortex_a7_initfn(Object *obj) > set_feature(&cpu->env, ARM_FEATURE_V7VE); > set_feature(&cpu->env, ARM_FEATURE_VFP4); > set_feature(&cpu->env, ARM_FEATURE_NEON); > - set_feature(&cpu->env, ARM_FEATURE_THUMB2EE); > set_feature(&cpu->env, ARM_FEATURE_GENERIC_TIMER); > set_feature(&cpu->env, ARM_FEATURE_DUMMY_C15_REGS); > set_feature(&cpu->env, ARM_FEATURE_CBAR_RO); > @@ -1614,7 +1611,6 @@ static void cortex_a15_initfn(Object *obj) > set_feature(&cpu->env, ARM_FEATURE_V7VE); > set_feature(&cpu->env, ARM_FEATURE_VFP4); > set_feature(&cpu->env, ARM_FEATURE_NEON); > - set_feature(&cpu->env, ARM_FEATURE_THUMB2EE); > set_feature(&cpu->env, ARM_FEATURE_GENERIC_TIMER); > set_feature(&cpu->env, ARM_FEATURE_DUMMY_C15_REGS); > set_feature(&cpu->env, ARM_FEATURE_CBAR_RO); > diff --git a/target/arm/helper.c b/target/arm/helper.c > index 64b1564594..5af89f6d9d 100644 > --- a/target/arm/helper.c > +++ b/target/arm/helper.c > @@ -5328,7 +5328,7 @@ void register_cp_regs_for_features(ARMCPU *cpu) > define_arm_cp_regs(cpu, vmsa_pmsa_cp_reginfo); > define_arm_cp_regs(cpu, vmsa_cp_reginfo); > } > - if (arm_feature(env, ARM_FEATURE_THUMB2EE)) { > + if (aa32_feature_t32ee(cpu)) { > define_arm_cp_regs(cpu, t2ee_cp_reginfo); > } > if (arm_feature(env, ARM_FEATURE_GENERIC_TIMER)) { > diff --git a/target/arm/machine.c b/target/arm/machine.c > index ff4ec22bf7..d44e891533 100644 > --- a/target/arm/machine.c > +++ b/target/arm/machine.c > @@ -301,9 +301,8 @@ static const VMStateDescription vmstate_m = { > static bool thumb2ee_needed(void *opaque) > { > ARMCPU *cpu = opaque; > - CPUARMState *env = &cpu->env; > > - return arm_feature(env, ARM_FEATURE_THUMB2EE); > + return aa32_feature_t32ee(cpu); > } > > static const VMStateDescription vmstate_thumb2ee = { >
diff --git a/target/arm/cpu.h b/target/arm/cpu.h index c9996d2534..da841f8538 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -1529,7 +1529,6 @@ enum arm_features { ARM_FEATURE_NEON, ARM_FEATURE_M, /* Microcontroller profile. */ ARM_FEATURE_OMAPCP, /* OMAP specific CP15 ops handling. */ - ARM_FEATURE_THUMB2EE, ARM_FEATURE_V7MP, /* v7 Multiprocessing Extensions */ ARM_FEATURE_V7VE, /* v7 Virtualization Extensions (non-EL2 parts) */ ARM_FEATURE_V4T, @@ -3123,6 +3122,11 @@ static inline bool aa32_feature_jazelle(ARMCPU *cpu) return FIELD_EX32(cpu->id_isar1, ID_ISAR1, JAZELLE) != 0; } +static inline bool aa32_feature_t32ee(ARMCPU *cpu) +{ + return FIELD_EX32(cpu->id_isar3, ID_ISAR3, T32EE) != 0; +} + static inline bool aa32_feature_aes(ARMCPU *cpu) { return FIELD_EX32(cpu->id_isar5, ID_ISAR5, AES) != 0; diff --git a/linux-user/elfload.c b/linux-user/elfload.c index 1ddb1fd102..01707ebb91 100644 --- a/linux-user/elfload.c +++ b/linux-user/elfload.c @@ -466,7 +466,7 @@ static uint32_t get_elf_hwcap(void) GET_FEATURE(ARM_FEATURE_V5, ARM_HWCAP_ARM_EDSP); GET_FEATURE(ARM_FEATURE_VFP, ARM_HWCAP_ARM_VFP); GET_FEATURE(ARM_FEATURE_IWMMXT, ARM_HWCAP_ARM_IWMMXT); - GET_FEATURE(ARM_FEATURE_THUMB2EE, ARM_HWCAP_ARM_THUMBEE); + GET_FEATURE_ID(t32ee, ARM_HWCAP_ARM_THUMBEE); GET_FEATURE(ARM_FEATURE_NEON, ARM_HWCAP_ARM_NEON); GET_FEATURE(ARM_FEATURE_VFP3, ARM_HWCAP_ARM_VFPv3); GET_FEATURE(ARM_FEATURE_V6K, ARM_HWCAP_ARM_TLS); diff --git a/target/arm/cpu.c b/target/arm/cpu.c index 41a1b27c61..abb1b6fe5c 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -1436,7 +1436,6 @@ static void cortex_a8_initfn(Object *obj) set_feature(&cpu->env, ARM_FEATURE_V7); set_feature(&cpu->env, ARM_FEATURE_VFP3); set_feature(&cpu->env, ARM_FEATURE_NEON); - set_feature(&cpu->env, ARM_FEATURE_THUMB2EE); set_feature(&cpu->env, ARM_FEATURE_DUMMY_C15_REGS); set_feature(&cpu->env, ARM_FEATURE_EL3); cpu->midr = 0x410fc080; @@ -1505,7 +1504,6 @@ static void cortex_a9_initfn(Object *obj) set_feature(&cpu->env, ARM_FEATURE_VFP3); set_feature(&cpu->env, ARM_FEATURE_VFP_FP16); set_feature(&cpu->env, ARM_FEATURE_NEON); - set_feature(&cpu->env, ARM_FEATURE_THUMB2EE); set_feature(&cpu->env, ARM_FEATURE_EL3); /* Note that A9 supports the MP extensions even for * A9UP and single-core A9MP (which are both different @@ -1568,7 +1566,6 @@ static void cortex_a7_initfn(Object *obj) set_feature(&cpu->env, ARM_FEATURE_V7VE); set_feature(&cpu->env, ARM_FEATURE_VFP4); set_feature(&cpu->env, ARM_FEATURE_NEON); - set_feature(&cpu->env, ARM_FEATURE_THUMB2EE); set_feature(&cpu->env, ARM_FEATURE_GENERIC_TIMER); set_feature(&cpu->env, ARM_FEATURE_DUMMY_C15_REGS); set_feature(&cpu->env, ARM_FEATURE_CBAR_RO); @@ -1614,7 +1611,6 @@ static void cortex_a15_initfn(Object *obj) set_feature(&cpu->env, ARM_FEATURE_V7VE); set_feature(&cpu->env, ARM_FEATURE_VFP4); set_feature(&cpu->env, ARM_FEATURE_NEON); - set_feature(&cpu->env, ARM_FEATURE_THUMB2EE); set_feature(&cpu->env, ARM_FEATURE_GENERIC_TIMER); set_feature(&cpu->env, ARM_FEATURE_DUMMY_C15_REGS); set_feature(&cpu->env, ARM_FEATURE_CBAR_RO); diff --git a/target/arm/helper.c b/target/arm/helper.c index 64b1564594..5af89f6d9d 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -5328,7 +5328,7 @@ void register_cp_regs_for_features(ARMCPU *cpu) define_arm_cp_regs(cpu, vmsa_pmsa_cp_reginfo); define_arm_cp_regs(cpu, vmsa_cp_reginfo); } - if (arm_feature(env, ARM_FEATURE_THUMB2EE)) { + if (aa32_feature_t32ee(cpu)) { define_arm_cp_regs(cpu, t2ee_cp_reginfo); } if (arm_feature(env, ARM_FEATURE_GENERIC_TIMER)) { diff --git a/target/arm/machine.c b/target/arm/machine.c index ff4ec22bf7..d44e891533 100644 --- a/target/arm/machine.c +++ b/target/arm/machine.c @@ -301,9 +301,8 @@ static const VMStateDescription vmstate_m = { static bool thumb2ee_needed(void *opaque) { ARMCPU *cpu = opaque; - CPUARMState *env = &cpu->env; - return arm_feature(env, ARM_FEATURE_THUMB2EE); + return aa32_feature_t32ee(cpu); } static const VMStateDescription vmstate_thumb2ee = {
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> --- target/arm/cpu.h | 6 +++++- linux-user/elfload.c | 2 +- target/arm/cpu.c | 4 ---- target/arm/helper.c | 2 +- target/arm/machine.c | 3 +-- 5 files changed, 8 insertions(+), 9 deletions(-) -- 2.17.1