Message ID | 20181002132026.14931-1-Jason@zx2c4.com |
---|---|
State | Superseded |
Headers | show |
Series | ARM: makefile: use ARMv3M mode for RiscPC | expand |
On 2 October 2018 at 15:20, Jason A. Donenfeld <Jason@zx2c4.com> wrote: > The purpose of CONFIG_CPU_32v3 is to avoid ldrh/strh on the RiscPC, > which is pretty much an ARMv4 device, except its bus will choke on the > half-words. The way to make the C compiler not output ldrh/strh is with > -march=armv3, which doesn't support them in the ISA. However, this > prevents certain cryptography code from working that uses instructions > like umull. Fortunately there's also -march=armv3m that does support > those, making it possible to continue assembling optimized cryptography > routines for our beloved RiscPC. > > Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com> > Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org> > Cc: Russell King <linux@armlinux.org.uk> > Cc: Arnd Bergmann <arnd@arndb.de> Acked-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> > --- > arch/arm/Makefile | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/arch/arm/Makefile b/arch/arm/Makefile > index d1516f85f25d..7fd4bcaf0721 100644 > --- a/arch/arm/Makefile > +++ b/arch/arm/Makefile > @@ -74,7 +74,7 @@ endif > arch-$(CONFIG_CPU_32v5) =-D__LINUX_ARM_ARCH__=5 $(call cc-option,-march=armv5te,-march=armv4t) > arch-$(CONFIG_CPU_32v4T) =-D__LINUX_ARM_ARCH__=4 -march=armv4t > arch-$(CONFIG_CPU_32v4) =-D__LINUX_ARM_ARCH__=4 -march=armv4 > -arch-$(CONFIG_CPU_32v3) =-D__LINUX_ARM_ARCH__=3 -march=armv3 > +arch-$(CONFIG_CPU_32v3) =-D__LINUX_ARM_ARCH__=3 -march=armv3m > > # Evaluate arch cc-option calls now > arch-y := $(arch-y) > -- > 2.19.0 >
On Tue, Oct 2, 2018 at 3:28 PM Ard Biesheuvel <ard.biesheuvel@linaro.org> wrote: > > On 2 October 2018 at 15:20, Jason A. Donenfeld <Jason@zx2c4.com> wrote: > > The purpose of CONFIG_CPU_32v3 is to avoid ldrh/strh on the RiscPC, > > which is pretty much an ARMv4 device, except its bus will choke on the > > half-words. The way to make the C compiler not output ldrh/strh is with > > -march=armv3, which doesn't support them in the ISA. However, this > > prevents certain cryptography code from working that uses instructions > > like umull. Fortunately there's also -march=armv3m that does support > > those, making it possible to continue assembling optimized cryptography > > routines for our beloved RiscPC. > > > > Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com> > > Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org> > > Cc: Russell King <linux@armlinux.org.uk> > > Cc: Arnd Bergmann <arnd@arndb.de> > > Acked-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Acked-by: Arnd Bergmann <arnd@arndb.de> Please add this to Russell's patch tracker for inclusion at http://www.arm.linux.org.uk/developer/patches/ Arnd
On Tue, Oct 2, 2018 at 3:54 PM Arnd Bergmann <arnd@arndb.de> wrote: > Please add this to Russell's patch tracker for inclusion at > http://www.arm.linux.org.uk/developer/patches/ Wild! And done: http://www.arm.linux.org.uk/developer/patches/viewpatch.php?id=8801/1
diff --git a/arch/arm/Makefile b/arch/arm/Makefile index d1516f85f25d..7fd4bcaf0721 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile @@ -74,7 +74,7 @@ endif arch-$(CONFIG_CPU_32v5) =-D__LINUX_ARM_ARCH__=5 $(call cc-option,-march=armv5te,-march=armv4t) arch-$(CONFIG_CPU_32v4T) =-D__LINUX_ARM_ARCH__=4 -march=armv4t arch-$(CONFIG_CPU_32v4) =-D__LINUX_ARM_ARCH__=4 -march=armv4 -arch-$(CONFIG_CPU_32v3) =-D__LINUX_ARM_ARCH__=3 -march=armv3 +arch-$(CONFIG_CPU_32v3) =-D__LINUX_ARM_ARCH__=3 -march=armv3m # Evaluate arch cc-option calls now arch-y := $(arch-y)
The purpose of CONFIG_CPU_32v3 is to avoid ldrh/strh on the RiscPC, which is pretty much an ARMv4 device, except its bus will choke on the half-words. The way to make the C compiler not output ldrh/strh is with -march=armv3, which doesn't support them in the ISA. However, this prevents certain cryptography code from working that uses instructions like umull. Fortunately there's also -march=armv3m that does support those, making it possible to continue assembling optimized cryptography routines for our beloved RiscPC. Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com> Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org> Cc: Russell King <linux@armlinux.org.uk> Cc: Arnd Bergmann <arnd@arndb.de> --- arch/arm/Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- 2.19.0