From patchwork Tue Oct 30 10:10:58 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vinod Koul X-Patchwork-Id: 149720 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp5248976ljp; Tue, 30 Oct 2018 03:11:53 -0700 (PDT) X-Google-Smtp-Source: AJdET5dJgpCEG5CFUtfBL0pEh8UIc/Dxo1qWuj2J9GS0cACXB9rHQoqikiZ4EuiSbF1tW+IfIpBP X-Received: by 2002:a17:902:2924:: with SMTP id g33-v6mr18283019plb.76.1540894313866; Tue, 30 Oct 2018 03:11:53 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1540894313; cv=none; d=google.com; s=arc-20160816; b=qF/nj8a65TpNCvynneY8zBqTy3QIfJ4k6iOE2xeODhOcuHJjWS/Dg55lGvBuW+4kur T7H6/csOLt5CNsTVItvarYYJH546dl67l+tHhsG9ZJtv3l0HhG4RTIrHHLz4n6OH5rxW g/GeVZYokaoeph40ObiyRXFvjwS+zHDGuULwUSbuiekAF5mu0zLvawVKC+gX2gC67GFE RA1gtwRA27UmU0neHTkvME761f9STd4tYy7nH27VE6KdI5wlBV0M+BvpUHZ+yEMfeGzU hi+5p8aeWHBqfnAWBQu4JYwoili6rzUhQDLOlHtatDYjK7nN2UwjmMKgzQrsh/kAnHr+ c4Mw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature; bh=jnnGgjudM5h/zeE3JiTA1CZiT6KoJ0/C0koj84f0p7g=; b=R/XvEJ8UKKYMGmcBcnFHVT95NLfjOyoQ9OUbI8jMPS12O5mvmQebq9hR+7+A+GWLYz +skQWdxClC8bwJo1xdc/UkIG36FXelko7wzm/J5aG3maNIFdqvRQSk65ejpAdp69U08C lBHrzBSbnJgXwzb1hopIZjaaJDdjrA+ZspnRZLR+PNOiX31BnUSggqSQLfPBMiw9zN/i aHaNsK19DbP14E2H2alfzYI//PKKzMXFf2wuOrcJRnZZSa327OEaoFxGKgHBw8NfMFqi kB6HDcJwf5asQzLCDRVPw40WXFSqXRdt40JW1eMJBfnvlc0BKG7lvuX4Ij9l0qltujD8 4ONw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b=M5QWtKQQ; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id y66-v6si22797682pgy.496.2018.10.30.03.11.53; Tue, 30 Oct 2018 03:11:53 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b=M5QWtKQQ; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727597AbeJ3TEl (ORCPT + 6 others); Tue, 30 Oct 2018 15:04:41 -0400 Received: from mail.kernel.org ([198.145.29.99]:42952 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726336AbeJ3TEk (ORCPT ); Tue, 30 Oct 2018 15:04:40 -0400 Received: from localhost.localdomain (unknown [171.61.91.108]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 5045620827; Tue, 30 Oct 2018 10:11:48 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1540894311; bh=O2v8L5nuAFECj8TUWv9dYj2yMN76bNIvc2BiUwNe5KI=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=M5QWtKQQAQayjFkr+CnqzDcp9SDR2XZ1POwL+Xflh4NMwOcOy9daxZO10NlJSLfOO 92WHTBnmfaVGUEJBrBps0wdG1x7Y+TG1HAMFIvOV/sDrRUFii/1j80dN1MMlZ0GM+B tihtR6if1QbgeYWg7vmG1DAK5Ww6zE8Lh5qBn6K4= From: Vinod Koul To: Andy Gross , David Brown Cc: Rob Herring , Mark Rutland , linux-arm-msm@vger.kernel.org, linux-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Bjorn Andersson , Vinod Koul Subject: [PATCH 07/17] arm64: dts: qcom: qcs404: Add sdcc1 node Date: Tue, 30 Oct 2018 15:40:58 +0530 Message-Id: <20181030101108.11041-8-vkoul@kernel.org> X-Mailer: git-send-email 2.14.4 In-Reply-To: <20181030101108.11041-1-vkoul@kernel.org> References: <20181030101108.11041-1-vkoul@kernel.org> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Bjorn Andersson Add the sdcc1 node and enable it for the QCS404-EVB. Signed-off-by: Bjorn Andersson Signed-off-by: Vinod Koul --- arch/arm64/boot/dts/qcom/qcs404-evb.dts | 64 +++++++++++++++++++++++++++++++++ arch/arm64/boot/dts/qcom/qcs404.dtsi | 17 +++++++++ 2 files changed, 81 insertions(+) -- 2.14.4 diff --git a/arch/arm64/boot/dts/qcom/qcs404-evb.dts b/arch/arm64/boot/dts/qcom/qcs404-evb.dts index 5bae7163a093..b79969153fba 100644 --- a/arch/arm64/boot/dts/qcom/qcs404-evb.dts +++ b/arch/arm64/boot/dts/qcom/qcs404-evb.dts @@ -116,3 +116,67 @@ }; }; }; + +&sdcc1 { + status = "ok"; + + mmc-ddr-1_8v; + bus-width = <8>; + non-removable; + + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&sdc1_on>; + pinctrl-1 = <&sdc1_off>; +}; + +&tlmm { + sdc1_on: sdc1-on { + clk { + pins = "sdc1_clk"; + bias-disable; + drive-strength = <16>; + }; + + cmd { + pins = "sdc1_cmd"; + bias-pull-up; + drive-strength = <10>; + }; + + data { + pins = "sdc1_data"; + bias-pull-up; + dreive-strength = <10>; + }; + + rclk { + pins = "sdc1_rclk"; + bias-pull-down; + }; + }; + + sdc1_off: sdc1-off { + clk { + pins = "sdc1_clk"; + bias-disable; + drive-strength = <2>; + }; + + cmd { + pins = "sdc1_cmd"; + bias-pull-up; + drive-strength = <2>; + }; + + data { + pins = "sdc1_data"; + bias-pull-up; + dreive-strength = <2>; + }; + + rclk { + pins = "sdc1_rclk"; + bias-pull-down; + }; + }; +}; diff --git a/arch/arm64/boot/dts/qcom/qcs404.dtsi b/arch/arm64/boot/dts/qcom/qcs404.dtsi index 1cfc8857d112..52e525d664bf 100644 --- a/arch/arm64/boot/dts/qcom/qcs404.dtsi +++ b/arch/arm64/boot/dts/qcom/qcs404.dtsi @@ -270,6 +270,23 @@ interrupt-controller; #interrupt-cells = <2>; }; + + sdcc1: sdcc@7804000 { + compatible = "qcom,sdhci-msm-v5"; + reg = <0x7804000 0x1000>, <0x7805000 0x1000>; + reg-names = "hc_mem", "cmdq_mem"; + + interrupts = , + ; + interrupt-names = "hc_irq", "pwr_irq"; + + clocks = <&gcc GCC_SDCC1_APPS_CLK>, + <&gcc GCC_SDCC1_AHB_CLK>, + <&xo_board>; + clock-names = "core", "iface", "xo"; + + status = "disabled"; + }; }; smp2p-adsp {