diff mbox series

[v2,6/6] arm: fix aa64_generate_debug_exceptions to work with EL2

Message ID 20181108163329.19940-7-alex.bennee@linaro.org
State New
Headers show
Series KVM Guest Debug fixes (plus TCG EL2 debug tweaks) | expand

Commit Message

Alex Bennée Nov. 8, 2018, 4:33 p.m. UTC
The test was incomplete and incorrectly caused debug exceptions to be
generated when returning to EL2 after a failed attempt to single-step
an EL1 instruction. Fix this while cleaning up the function a little.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>

---
 target/arm/cpu.h | 27 +++++++++++++++++----------
 1 file changed, 17 insertions(+), 10 deletions(-)

-- 
2.17.1

Comments

Richard Henderson Nov. 8, 2018, 5:25 p.m. UTC | #1
On 11/8/18 5:33 PM, Alex Bennée wrote:
> The test was incomplete and incorrectly caused debug exceptions to be

> generated when returning to EL2 after a failed attempt to single-step

> an EL1 instruction. Fix this while cleaning up the function a little.

> 

> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>

> ---

>  target/arm/cpu.h | 27 +++++++++++++++++----------

>  1 file changed, 17 insertions(+), 10 deletions(-)

> 

> diff --git a/target/arm/cpu.h b/target/arm/cpu.h

> index 1efff21a18..a6d8eb14f6 100644

> --- a/target/arm/cpu.h

> +++ b/target/arm/cpu.h

> @@ -2764,23 +2764,33 @@ static inline bool arm_v7m_csselr_razwi(ARMCPU *cpu)

>      return (cpu->clidr & R_V7M_CLIDR_CTYPE_ALL_MASK) != 0;

>  }

>  

> +/* See AArch64.GenerateDebugExceptionsFrom() in ARM ARM pseudocode */

>  static inline bool aa64_generate_debug_exceptions(CPUARMState *env)

>  {

> +    int cur_el = arm_current_el(env);

> +    int debug_el;

> +

>      if (arm_is_secure(env)) {

>          /* MDCR_EL3.SDD disables debug events from Secure state */

>          if (extract32(env->cp15.mdcr_el3, 16, 1) != 0

> -            || arm_current_el(env) == 3) {

> +            || cur_el == 3) {


Hmm.  Perhaps better as

    if (cur_el == 3) {
        return false;
    }
    /* MDCR_EL3.SDD disables... */
    if (arm_is_secure_below_el3(env)
        && extract32(env->cp15.mdcr_el3, 16, 1)) {
        return false;
    }

and of course more symbols would be nice, but it's not wrong as-is.


r~
diff mbox series

Patch

diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index 1efff21a18..a6d8eb14f6 100644
--- a/target/arm/cpu.h
+++ b/target/arm/cpu.h
@@ -2764,23 +2764,33 @@  static inline bool arm_v7m_csselr_razwi(ARMCPU *cpu)
     return (cpu->clidr & R_V7M_CLIDR_CTYPE_ALL_MASK) != 0;
 }
 
+/* See AArch64.GenerateDebugExceptionsFrom() in ARM ARM pseudocode */
 static inline bool aa64_generate_debug_exceptions(CPUARMState *env)
 {
+    int cur_el = arm_current_el(env);
+    int debug_el;
+
     if (arm_is_secure(env)) {
         /* MDCR_EL3.SDD disables debug events from Secure state */
         if (extract32(env->cp15.mdcr_el3, 16, 1) != 0
-            || arm_current_el(env) == 3) {
+            || cur_el == 3) {
             return false;
         }
     }
 
-    if (arm_current_el(env) == arm_debug_target_el(env)) {
-        if ((extract32(env->cp15.mdscr_el1, 13, 1) == 0)
-            || (env->daif & PSTATE_D)) {
-            return false;
-        }
+    /*
+     * Same EL to same EL debug exceptions need MDSCR_KDE enabled
+     * while not masking the (D)ebug bit in DAIF.
+     */
+    debug_el = arm_debug_target_el(env);
+
+    if (cur_el == debug_el) {
+        return extract32(env->cp15.mdscr_el1, 13, 1)
+            && !(env->daif & PSTATE_D);
     }
-    return true;
+
+    /* Otherwise the debug target needs to be a higher EL */
+    return debug_el > cur_el;
 }
 
 static inline bool aa32_generate_debug_exceptions(CPUARMState *env)
@@ -2833,9 +2843,6 @@  static inline bool aa32_generate_debug_exceptions(CPUARMState *env)
  * since the pseudocode has it at all callsites except for the one in
  * CheckSoftwareStep(), where it is elided because both branches would
  * always return the same value.
- *
- * Parts of the pseudocode relating to EL2 and EL3 are omitted because we
- * don't yet implement those exception levels or their associated trap bits.
  */
 static inline bool arm_generate_debug_exceptions(CPUARMState *env)
 {