Message ID | 20190125232616.25714-1-bjorn.andersson@linaro.org |
---|---|
State | Accepted |
Commit | 02b485e31d98265189b91f3e69c43df2ed50610c |
Headers | show |
Series | PCI: qcom: Don't deassert reset GPIO during probe | expand |
On Fri, Jan 25, 2019 at 03:26:16PM -0800, Bjorn Andersson wrote: > Acquiring the reset GPIO low means that reset is being deasserted, this > is followed almost immediately with qcom_pcie_host_init() asserting it, > initializing it and then finally deasserting it again, for the link to > come up. > > Some PCIe devices requires a minimum time between the initial deassert > and subsequent reset cycles. In a platform that boots with the reset > GPIO asserted this requirement is being violated by this deassert/assert > pulse. > > Acquiring the reset GPIO high will prevent this by matching the state to > the subsequent asserted state. > > Cc: stable@vger.kernel.org Missing Fixes: tag, please provide me one so that I can proceed. Lorenzo > Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> > --- > drivers/pci/controller/dwc/pcie-qcom.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controller/dwc/pcie-qcom.c > index d185ea5fe996..a7f703556790 100644 > --- a/drivers/pci/controller/dwc/pcie-qcom.c > +++ b/drivers/pci/controller/dwc/pcie-qcom.c > @@ -1228,7 +1228,7 @@ static int qcom_pcie_probe(struct platform_device *pdev) > > pcie->ops = of_device_get_match_data(dev); > > - pcie->reset = devm_gpiod_get_optional(dev, "perst", GPIOD_OUT_LOW); > + pcie->reset = devm_gpiod_get_optional(dev, "perst", GPIOD_OUT_HIGH); > if (IS_ERR(pcie->reset)) { > ret = PTR_ERR(pcie->reset); > goto err_pm_runtime_put; > -- > 2.18.0 >
diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controller/dwc/pcie-qcom.c index d185ea5fe996..a7f703556790 100644 --- a/drivers/pci/controller/dwc/pcie-qcom.c +++ b/drivers/pci/controller/dwc/pcie-qcom.c @@ -1228,7 +1228,7 @@ static int qcom_pcie_probe(struct platform_device *pdev) pcie->ops = of_device_get_match_data(dev); - pcie->reset = devm_gpiod_get_optional(dev, "perst", GPIOD_OUT_LOW); + pcie->reset = devm_gpiod_get_optional(dev, "perst", GPIOD_OUT_HIGH); if (IS_ERR(pcie->reset)) { ret = PTR_ERR(pcie->reset); goto err_pm_runtime_put;
Acquiring the reset GPIO low means that reset is being deasserted, this is followed almost immediately with qcom_pcie_host_init() asserting it, initializing it and then finally deasserting it again, for the link to come up. Some PCIe devices requires a minimum time between the initial deassert and subsequent reset cycles. In a platform that boots with the reset GPIO asserted this requirement is being violated by this deassert/assert pulse. Acquiring the reset GPIO high will prevent this by matching the state to the subsequent asserted state. Cc: stable@vger.kernel.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> --- drivers/pci/controller/dwc/pcie-qcom.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- 2.18.0