| Message ID | 20190318083053.24197-1-linus.walleij@linaro.org |
|---|---|
| State | New |
| Headers | show |
| Series | ARM: l2x0: add L210 write allocate override flag | expand |
On 18.03.2019 09:30, Linus Walleij wrote: > This adds support for setting the flag bit "write allocate > override" to the L210 variant. > > The "write allocate override" bit is used on the Nomadik STn8815 > and is necessary to properly make use of the L210 cache on that > machine without sporadic crashes. > > After this the platform can boot and run without any out-of-tree > patches. > > Cc: devicetree@vger.kernel.org > Cc: Russell King <linux@arm.linux.org.uk> > Signed-off-by: Linus Walleij <linus.walleij@linaro.org> > --- > Documentation/devicetree/bindings/arm/l2c2x0.yaml | 5 +++++ > arch/arm/mm/cache-l2x0.c | 8 ++++++++ > 2 files changed, 13 insertions(+) > > diff --git a/Documentation/devicetree/bindings/arm/l2c2x0.yaml > b/Documentation/devicetree/bindings/arm/l2c2x0.yaml > index bfc5c185561c..4cffcda3e2b7 100644 > --- a/Documentation/devicetree/bindings/arm/l2c2x0.yaml > +++ b/Documentation/devicetree/bindings/arm/l2c2x0.yaml > @@ -168,6 +168,11 @@ properties: > be specified to indicate that such transforms are precluded. > type: boolean > > + arm,write-allocate-override: > + description: On L210 only, normally the L210 will use HPROT attributes, > + setting this bit overrides that behaviour and cause the cache to make all > + write-through and write-back accesses into read-write-allocate accesses. Is type missing here? It is there in the above and below properties... Not sure though if it's required, I am not very familiar with device tree yaml schema yet. -- Stefan > + > arm,parity-enable: > description: enable parity checking on the L2 cache (L220 or PL310). > type: boolean > diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c > index 808efbb89b88..5cbdb9c18884 100644 > --- a/arch/arm/mm/cache-l2x0.c > +++ b/arch/arm/mm/cache-l2x0.c > @@ -1078,6 +1078,14 @@ static void __init l2x0_of_parse(const struct > device_node *np, > val |= L2C_AUX_CTRL_SHARED_OVERRIDE; > } > > + /* L210-specific aux control flag */ > + if (of_device_is_compatible(np, "arm,l210-cache")) { > + if (of_property_read_bool(np, "arm,write-allocate-override")) { > + mask &= ~L210_AUX_CTRL_WA_OVERRIDE; > + val |= L210_AUX_CTRL_WA_OVERRIDE; > + } > + } > + > ret = l2x0_cache_size_of_parse(np, aux_val, aux_mask, &assoc, SZ_256K); > if (ret) > return;
On Mon, Mar 18, 2019 at 09:30:53AM +0100, Linus Walleij wrote: > This adds support for setting the flag bit "write allocate > override" to the L210 variant. > > The "write allocate override" bit is used on the Nomadik STn8815 > and is necessary to properly make use of the L210 cache on that > machine without sporadic crashes. > > After this the platform can boot and run without any out-of-tree > patches. This is not something that should be done by the kernel but by the firmware - needing this bit set is a basic requirement of having the caches enabled, and if (eg) the boot loader enables the caches it too will suffer this problem. > > Cc: devicetree@vger.kernel.org > Cc: Russell King <linux@arm.linux.org.uk> > Signed-off-by: Linus Walleij <linus.walleij@linaro.org> > --- > Documentation/devicetree/bindings/arm/l2c2x0.yaml | 5 +++++ > arch/arm/mm/cache-l2x0.c | 8 ++++++++ > 2 files changed, 13 insertions(+) > > diff --git a/Documentation/devicetree/bindings/arm/l2c2x0.yaml b/Documentation/devicetree/bindings/arm/l2c2x0.yaml > index bfc5c185561c..4cffcda3e2b7 100644 > --- a/Documentation/devicetree/bindings/arm/l2c2x0.yaml > +++ b/Documentation/devicetree/bindings/arm/l2c2x0.yaml > @@ -168,6 +168,11 @@ properties: > be specified to indicate that such transforms are precluded. > type: boolean > > + arm,write-allocate-override: > + description: On L210 only, normally the L210 will use HPROT attributes, > + setting this bit overrides that behaviour and cause the cache to make all > + write-through and write-back accesses into read-write-allocate accesses. > + > arm,parity-enable: > description: enable parity checking on the L2 cache (L220 or PL310). > type: boolean > diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c > index 808efbb89b88..5cbdb9c18884 100644 > --- a/arch/arm/mm/cache-l2x0.c > +++ b/arch/arm/mm/cache-l2x0.c > @@ -1078,6 +1078,14 @@ static void __init l2x0_of_parse(const struct device_node *np, > val |= L2C_AUX_CTRL_SHARED_OVERRIDE; > } > > + /* L210-specific aux control flag */ > + if (of_device_is_compatible(np, "arm,l210-cache")) { > + if (of_property_read_bool(np, "arm,write-allocate-override")) { > + mask &= ~L210_AUX_CTRL_WA_OVERRIDE; > + val |= L210_AUX_CTRL_WA_OVERRIDE; > + } > + } > + > ret = l2x0_cache_size_of_parse(np, aux_val, aux_mask, &assoc, SZ_256K); > if (ret) > return; > -- > 2.20.1 > > > _______________________________________________ > linux-arm-kernel mailing list > linux-arm-kernel@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel > -- RMK's Patch system: https://www.armlinux.org.uk/developer/patches/ FTTC broadband for 0.8mile line in suburbia: sync at 12.1Mbps down 622kbps up According to speedtest.net: 11.9Mbps down 500kbps up
On Mon, Mar 18, 2019 at 3:04 PM Russell King - ARM Linux admin <linux@armlinux.org.uk> wrote: > On Mon, Mar 18, 2019 at 09:30:53AM +0100, Linus Walleij wrote: > > This adds support for setting the flag bit "write allocate > > override" to the L210 variant. > > > > The "write allocate override" bit is used on the Nomadik STn8815 > > and is necessary to properly make use of the L210 cache on that > > machine without sporadic crashes. > > > > After this the platform can boot and run without any out-of-tree > > patches. > > This is not something that should be done by the kernel but by the > firmware - needing this bit set is a basic requirement of having > the caches enabled, and if (eg) the boot loader enables the caches > it too will suffer this problem. I see your point. This U-Boot port does not enable the cache, I guess because it was a bit unusual for ARM926EJ-S machines to have L2 cache at the time, and I remember U-Boot was not using L2CC for a long time (maybe still not?). The Nomadik was unstable for years and then I looked at the outoftree vendor kernel and saw that it sets this bit and since I did that it has been rock solid. I can of course try to recompile and reflash the U-Boot for this board but it is stored in NAND flash and if I break it, ugh, I have toasted this board and I only have one. So I'm scared about that. I have been carrying this as an out-of-tree patch for years and I can of course continue to do so, I just felt it was a bit sad so I tried to diet down the previous patch to the single bit the Nomadik needs to set up for it's L2CC to work. Yours, Linus Walleij
On Mon, Mar 18, 2019 at 11:14:05PM +0100, Linus Walleij wrote: > On Mon, Mar 18, 2019 at 3:04 PM Russell King - ARM Linux admin > <linux@armlinux.org.uk> wrote: > > On Mon, Mar 18, 2019 at 09:30:53AM +0100, Linus Walleij wrote: > > > This adds support for setting the flag bit "write allocate > > > override" to the L210 variant. > > > > > > The "write allocate override" bit is used on the Nomadik STn8815 > > > and is necessary to properly make use of the L210 cache on that > > > machine without sporadic crashes. > > > > > > After this the platform can boot and run without any out-of-tree > > > patches. > > > > This is not something that should be done by the kernel but by the > > firmware - needing this bit set is a basic requirement of having > > the caches enabled, and if (eg) the boot loader enables the caches > > it too will suffer this problem. > > I see your point. This U-Boot port does not enable the cache, I guess > because it was a bit unusual for ARM926EJ-S machines to have > L2 cache at the time, and I remember U-Boot was not using L2CC for > a long time (maybe still not?). > > The Nomadik was unstable for years and then I looked at the > outoftree vendor kernel and saw that it sets this bit and since I did that > it has been rock solid. > > I can of course try to recompile and reflash the U-Boot for this > board but it is stored in NAND flash and if I break it, ugh, I have > toasted this board and I only have one. So I'm scared about that. > > I have been carrying this as an out-of-tree patch for years and I can of > course continue to do so, I just felt it was a bit sad so I tried > to diet down the previous patch to the single bit the Nomadik > needs to set up for it's L2CC to work. I'm okay with the property as properties for every last L2x0 register bit pretty much already happened. However, can't you set the bit in the machine desc l2c_aux_val? Rob
diff --git a/Documentation/devicetree/bindings/arm/l2c2x0.yaml b/Documentation/devicetree/bindings/arm/l2c2x0.yaml index bfc5c185561c..4cffcda3e2b7 100644 --- a/Documentation/devicetree/bindings/arm/l2c2x0.yaml +++ b/Documentation/devicetree/bindings/arm/l2c2x0.yaml @@ -168,6 +168,11 @@ properties: be specified to indicate that such transforms are precluded. type: boolean + arm,write-allocate-override: + description: On L210 only, normally the L210 will use HPROT attributes, + setting this bit overrides that behaviour and cause the cache to make all + write-through and write-back accesses into read-write-allocate accesses. + arm,parity-enable: description: enable parity checking on the L2 cache (L220 or PL310). type: boolean diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c index 808efbb89b88..5cbdb9c18884 100644 --- a/arch/arm/mm/cache-l2x0.c +++ b/arch/arm/mm/cache-l2x0.c @@ -1078,6 +1078,14 @@ static void __init l2x0_of_parse(const struct device_node *np, val |= L2C_AUX_CTRL_SHARED_OVERRIDE; } + /* L210-specific aux control flag */ + if (of_device_is_compatible(np, "arm,l210-cache")) { + if (of_property_read_bool(np, "arm,write-allocate-override")) { + mask &= ~L210_AUX_CTRL_WA_OVERRIDE; + val |= L210_AUX_CTRL_WA_OVERRIDE; + } + } + ret = l2x0_cache_size_of_parse(np, aux_val, aux_mask, &assoc, SZ_256K); if (ret) return;
This adds support for setting the flag bit "write allocate override" to the L210 variant. The "write allocate override" bit is used on the Nomadik STn8815 and is necessary to properly make use of the L210 cache on that machine without sporadic crashes. After this the platform can boot and run without any out-of-tree patches. Cc: devicetree@vger.kernel.org Cc: Russell King <linux@arm.linux.org.uk> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> --- Documentation/devicetree/bindings/arm/l2c2x0.yaml | 5 +++++ arch/arm/mm/cache-l2x0.c | 8 ++++++++ 2 files changed, 13 insertions(+) -- 2.20.1