diff mbox series

[Xen-devel] xen/arm64: head: Combine lsl and str instructions in a single one

Message ID 20190319232753.26521-1-julien.grall@arm.com
State New
Headers show
Series [Xen-devel] xen/arm64: head: Combine lsl and str instructions in a single one | expand

Commit Message

Julien Grall March 19, 2019, 11:27 p.m. UTC
From: Julien Grall <julien.grall@linaro.org>

We can optimize a bit the assembly code by combining the 2 instructions
in a single one. This likely not going to make the code faster, but
likely make easier to read the assembly.

Signed-off-by: Julien Grall <julien.grall@linaro.org>
---
 xen/arch/arm/arm64/head.S | 12 ++++--------
 1 file changed, 4 insertions(+), 8 deletions(-)

Comments

Stefano Stabellini April 16, 2019, 9:07 p.m. UTC | #1
On Tue, 19 Mar 2019, Julien Grall wrote:
> From: Julien Grall <julien.grall@linaro.org>
> 
> We can optimize a bit the assembly code by combining the 2 instructions
> in a single one. This likely not going to make the code faster, but
> likely make easier to read the assembly.
> 
> Signed-off-by: Julien Grall <julien.grall@linaro.org>

Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>


> ---
>  xen/arch/arm/arm64/head.S | 12 ++++--------
>  1 file changed, 4 insertions(+), 8 deletions(-)
> 
> diff --git a/xen/arch/arm/arm64/head.S b/xen/arch/arm/arm64/head.S
> index 0b7f6e7f92..4589a37874 100644
> --- a/xen/arch/arm/arm64/head.S
> +++ b/xen/arch/arm/arm64/head.S
> @@ -418,8 +418,7 @@ skip_bss:
>  
>          mov   x3, #PT_PT             /* x2 := table map of boot_first_id */
>          orr   x2, x2, x3             /*       + rights for linear PT */
> -        lsl   x1, x1, #3             /* x1 := Slot offset */
> -        str   x2, [x4, x1]
> +        str   x2, [x4, x1, lsl #3]
>  
>          load_paddr x4, boot_first_id
>  
> @@ -428,8 +427,7 @@ skip_bss:
>          mov   x3, #PT_MEM            /* x2 := Section map */
>          orr   x2, x2, x3
>          and   x1, x1, #LPAE_ENTRY_MASK /* x1 := Slot offset */
> -        lsl   x1, x1, #3
> -        str   x2, [x4, x1]           /* Mapping of paddr(start) */
> +        str   x2, [x4, x1, lsl #3]   /* Mapping of paddr(start) */
>          mov   x25, #1                /* x25 := identity map now in place */
>  
>  1:      /* Setup boot_first: */
> @@ -450,8 +448,7 @@ skip_bss:
>          lsl   x2, x2, #FIRST_SHIFT   /* Base address for 1GB mapping */
>          mov   x3, #PT_MEM            /* x2 := Section map */
>          orr   x2, x2, x3
> -        lsl   x1, x1, #3             /* x1 := Slot offset */
> -        str   x2, [x4, x1]           /* Create mapping of paddr(start)*/
> +        str   x2, [x4, x1, lsl #3]   /* Create mapping of paddr(start)*/
>          mov   x25, #1                /* x25 := identity map now in place */
>  
>  1:      /* Setup boot_second: */
> @@ -473,8 +470,7 @@ skip_bss:
>          lsl   x2, x2, #SECOND_SHIFT  /* Base address for 2MB mapping */
>          mov   x3, #PT_MEM            /* x2 := Section map */
>          orr   x2, x2, x3
> -        lsl   x1, x1, #3             /* x1 := Slot offset */
> -        str   x2, [x4, x1]           /* Create mapping of paddr(start)*/
> +        str   x2, [x4, x1, lsl #3]   /* Create mapping of paddr(start)*/
>          mov   x25, #1                /* x25 := identity map now in place */
>  
>  1:      /* Setup boot_third: */
> -- 
> 2.11.0
>
Julien Grall April 17, 2019, 4:30 p.m. UTC | #2
Hi,

On 16/04/2019 22:07, Stefano Stabellini wrote:
> On Tue, 19 Mar 2019, Julien Grall wrote:
>> From: Julien Grall <julien.grall@linaro.org>
>>
>> We can optimize a bit the assembly code by combining the 2 instructions
>> in a single one. This likely not going to make the code faster, but
>> likely make easier to read the assembly.
>>
>> Signed-off-by: Julien Grall <julien.grall@linaro.org>
> 
> Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>

Thank you! I have pushed to my branch next-4.13 for now. It will be merged once 
the commit moratorium is lifted.

Cheers,
diff mbox series

Patch

diff --git a/xen/arch/arm/arm64/head.S b/xen/arch/arm/arm64/head.S
index 0b7f6e7f92..4589a37874 100644
--- a/xen/arch/arm/arm64/head.S
+++ b/xen/arch/arm/arm64/head.S
@@ -418,8 +418,7 @@  skip_bss:
 
         mov   x3, #PT_PT             /* x2 := table map of boot_first_id */
         orr   x2, x2, x3             /*       + rights for linear PT */
-        lsl   x1, x1, #3             /* x1 := Slot offset */
-        str   x2, [x4, x1]
+        str   x2, [x4, x1, lsl #3]
 
         load_paddr x4, boot_first_id
 
@@ -428,8 +427,7 @@  skip_bss:
         mov   x3, #PT_MEM            /* x2 := Section map */
         orr   x2, x2, x3
         and   x1, x1, #LPAE_ENTRY_MASK /* x1 := Slot offset */
-        lsl   x1, x1, #3
-        str   x2, [x4, x1]           /* Mapping of paddr(start) */
+        str   x2, [x4, x1, lsl #3]   /* Mapping of paddr(start) */
         mov   x25, #1                /* x25 := identity map now in place */
 
 1:      /* Setup boot_first: */
@@ -450,8 +448,7 @@  skip_bss:
         lsl   x2, x2, #FIRST_SHIFT   /* Base address for 1GB mapping */
         mov   x3, #PT_MEM            /* x2 := Section map */
         orr   x2, x2, x3
-        lsl   x1, x1, #3             /* x1 := Slot offset */
-        str   x2, [x4, x1]           /* Create mapping of paddr(start)*/
+        str   x2, [x4, x1, lsl #3]   /* Create mapping of paddr(start)*/
         mov   x25, #1                /* x25 := identity map now in place */
 
 1:      /* Setup boot_second: */
@@ -473,8 +470,7 @@  skip_bss:
         lsl   x2, x2, #SECOND_SHIFT  /* Base address for 2MB mapping */
         mov   x3, #PT_MEM            /* x2 := Section map */
         orr   x2, x2, x3
-        lsl   x1, x1, #3             /* x1 := Slot offset */
-        str   x2, [x4, x1]           /* Create mapping of paddr(start)*/
+        str   x2, [x4, x1, lsl #3]   /* Create mapping of paddr(start)*/
         mov   x25, #1                /* x25 := identity map now in place */
 
 1:      /* Setup boot_third: */