From patchwork Mon Apr 22 16:49:32 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Julien Grall X-Patchwork-Id: 162619 Delivered-To: patch@linaro.org Received: by 2002:a02:c6d8:0:0:0:0:0 with SMTP id r24csp2801627jan; Mon, 22 Apr 2019 09:51:35 -0700 (PDT) X-Google-Smtp-Source: APXvYqz9I5NrriWMgF/RlvdLffzgbJoF8SaVqq3h/CM2Y0GJhnu/gRc63TjAlZYlCDXbExoifm5n X-Received: by 2002:a0d:dbd7:: with SMTP id d206mr17401104ywe.332.1555951895818; Mon, 22 Apr 2019 09:51:35 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1555951895; cv=none; d=google.com; s=arc-20160816; b=pT+8Lhdd/ey7VvloE3UXKrT9qFVP57RNrUhlFCNsqSs7gg0wOpx8+qC5xHU/vo5wzl m8QdGceOJPsxLsQwFaM0TAQ+UjBcOQKDpAQUuwDnpnPl+Bx8thXoYeIslJFLBkTMOKBe ZwC8R8eux1oVVnXWJvbE6LyqanW/jRdSMScUenU9QmFGb/EQ9uxwN+OtBm/WC4V9hlXy P7zZivQKj8VoqqhcJwgjTHv3awBH8WJV9ddh0+B5kvZGSRcgEgA4UzTSps5lv9fffhm+ bFxWede+bLNeUWj9S5N7CndSj6DpoVM69Q2SQugd4h1ZEST1wwMcvjDNCc5VmNJvQMnF 6eYw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version:cc :list-subscribe:list-help:list-post:list-unsubscribe:list-id :precedence:subject:references:in-reply-to:message-id:date:to:from; bh=il4ZcLt2h9cI6G0bYMe1TL1OCibLiwKyT++mhks/O6U=; b=UQLFOJYnSUEAl7OuRQONCRdksOF5zZjzMFPzNmKBHf9W1Q8aws34oVpWpggZOc7/Hu JIayHH3cA739ssvOuO+6XuArMC6cQ0sSWBME4hzmWrf6JqsjIbEX4AMPAsUR5KxHPbx3 nrgKCsJncSMJXCc4/pudfQy6kYMBAWuBYnAxUxhdYzp5W5RFS6k9tizrzHRljkSfSW9L Hbw2o2jc/NHePsrastG299NARi5cqLc6GRbdy3rFVU4lG2K0N7TkZZSCKMhMbWDqSMzF ZnjPmwON3lxs4Hy3cgCDyd1nLiCZWFk3iIhWrCQWK3U8eyRc6lVh2xDenkbJZr4Jajtg d1tw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org Return-Path: Received: from lists.xenproject.org (lists.xenproject.org. [192.237.175.120]) by mx.google.com with ESMTPS id j190si6371098ywd.431.2019.04.22.09.51.35 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Mon, 22 Apr 2019 09:51:35 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of xen-devel-bounces@lists.xenproject.org designates 192.237.175.120 as permitted sender) smtp.mailfrom=xen-devel-bounces@lists.xenproject.org Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1hIc90-0005Ja-Dh; Mon, 22 Apr 2019 16:50:14 +0000 Received: from us1-rack-dfw2.inumbo.com ([104.130.134.6]) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1hIc8y-0005GP-Je for xen-devel@lists.xenproject.org; Mon, 22 Apr 2019 16:50:12 +0000 X-Inumbo-ID: b1836d79-651e-11e9-92d7-bc764e045a96 Received: from foss.arm.com (unknown [217.140.101.70]) by us1-rack-dfw2.inumbo.com (Halon) with ESMTP id b1836d79-651e-11e9-92d7-bc764e045a96; Mon, 22 Apr 2019 16:50:11 +0000 (UTC) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 2DBDA15AB; Mon, 22 Apr 2019 09:50:11 -0700 (PDT) Received: from e108454-lin.cambridge.arm.com (e108454-lin.cambridge.arm.com [10.1.196.50]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 1E5F23F557; Mon, 22 Apr 2019 09:50:09 -0700 (PDT) From: Julien Grall To: xen-devel@lists.xenproject.org Date: Mon, 22 Apr 2019 17:49:32 +0100 Message-Id: <20190422164937.21350-16-julien.grall@arm.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20190422164937.21350-1-julien.grall@arm.com> References: <20190422164937.21350-1-julien.grall@arm.com> Subject: [Xen-devel] [PATCH 15/20] xen/arm: mm: Use the shorter version __aligned(PAGE_SIZE) to align page-tables X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: Oleksandr_Tyshchenko@epam.com, Julien Grall , sstabellini@kernel.org, Andrii_Anisov@epam.com MIME-Version: 1.0 Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" We currently use the very long version __attribute__((__aligned(4096))) to align page-tables. Thankfully there is a shorter version to make the code more readable. While modifying the attribute: 1) Move it before the variable name as we do in other part of Xen 2) Switch to PAGE_SIZE instead of 4096 to make more future-proof 3) Mark static page-tables not used outside the file (i.e any page-tables other than boot_* and xen_fixmap). Lastly, some of the variables use __attribute__(__aligned(X * 4096)). However this is not necessary as page-tables are only required to be to be aligned to a page-size. So use __aligned(PAGE_SIZE). Signed-off-by: Julien Grall Reviewed-by: Andrii Anisov --- xen/arch/arm/mm.c | 27 +++++++++++++-------------- 1 file changed, 13 insertions(+), 14 deletions(-) diff --git a/xen/arch/arm/mm.c b/xen/arch/arm/mm.c index 6db7dda0da..fa0f41bd07 100644 --- a/xen/arch/arm/mm.c +++ b/xen/arch/arm/mm.c @@ -73,13 +73,13 @@ struct domain *dom_xen, *dom_io, *dom_cow; * Finally, if EARLY_PRINTK is enabled then xen_fixmap will be mapped * by the CPU once it has moved off the 1:1 mapping. */ -lpae_t boot_pgtable[LPAE_ENTRIES] __attribute__((__aligned__(4096))); +lpae_t __aligned(PAGE_SIZE) boot_pgtable[LPAE_ENTRIES]; #ifdef CONFIG_ARM_64 -lpae_t boot_first[LPAE_ENTRIES] __attribute__((__aligned__(4096))); -lpae_t boot_first_id[LPAE_ENTRIES] __attribute__((__aligned__(4096))); +lpae_t __aligned(PAGE_SIZE) boot_first[LPAE_ENTRIES]; +lpae_t __aligned(PAGE_SIZE) boot_first_id[LPAE_ENTRIES]; #endif -lpae_t boot_second[LPAE_ENTRIES] __attribute__((__aligned__(4096))); -lpae_t boot_third[LPAE_ENTRIES] __attribute__((__aligned__(4096))); +lpae_t __aligned(PAGE_SIZE) boot_second[LPAE_ENTRIES]; +lpae_t __aligned(PAGE_SIZE) boot_third[LPAE_ENTRIES]; /* Main runtime page tables */ @@ -93,8 +93,8 @@ lpae_t boot_third[LPAE_ENTRIES] __attribute__((__aligned__(4096))); #ifdef CONFIG_ARM_64 #define HYP_PT_ROOT_LEVEL 0 -lpae_t xen_pgtable[LPAE_ENTRIES] __attribute__((__aligned__(4096))); -lpae_t xen_first[LPAE_ENTRIES] __attribute__((__aligned__(4096))); +static lpae_t __aligned(PAGE_SIZE) xen_pgtable[LPAE_ENTRIES]; +static lpae_t __aligned(PAGE_SIZE) xen_first[LPAE_ENTRIES]; #define THIS_CPU_PGTABLE xen_pgtable #else #define HYP_PT_ROOT_LEVEL 1 @@ -107,17 +107,16 @@ static DEFINE_PER_CPU(lpae_t *, xen_pgtable); * DOMHEAP_VIRT_START...DOMHEAP_VIRT_END in 2MB chunks. */ static DEFINE_PER_CPU(lpae_t *, xen_dommap); /* Root of the trie for cpu0, other CPU's PTs are dynamically allocated */ -lpae_t cpu0_pgtable[LPAE_ENTRIES] __attribute__((__aligned__(4096))); +static lpae_t __aligned(PAGE_SIZE) cpu0_pgtable[LPAE_ENTRIES]; /* cpu0's domheap page tables */ -lpae_t cpu0_dommap[LPAE_ENTRIES*DOMHEAP_SECOND_PAGES] - __attribute__((__aligned__(4096*DOMHEAP_SECOND_PAGES))); +static lpae_t __aligned(PAGE_SIZE) cpu0_dommap[LPAE_ENTRIES*DOMHEAP_SECOND_PAGES]; #endif #ifdef CONFIG_ARM_64 /* The first page of the first level mapping of the xenheap. The * subsequent xenheap first level pages are dynamically allocated, but * we need this one to bootstrap ourselves. */ -lpae_t xenheap_first_first[LPAE_ENTRIES] __attribute__((__aligned__(4096))); +static lpae_t __aligned(PAGE_SIZE) xenheap_first_first[LPAE_ENTRIES]; /* The zeroeth level slot which uses xenheap_first_first. Used because * setup_xenheap_mappings otherwise relies on mfn_to_virt which isn't * valid for a non-xenheap mapping. */ @@ -131,12 +130,12 @@ static __initdata int xenheap_first_first_slot = -1; * addresses from 0 to 0x7fffffff. Offsets into it are calculated * with second_linear_offset(), not second_table_offset(). */ -lpae_t xen_second[LPAE_ENTRIES*2] __attribute__((__aligned__(4096*2))); +static lpae_t __aligned(PAGE_SIZE) xen_second[LPAE_ENTRIES*2]; /* First level page table used for fixmap */ -lpae_t xen_fixmap[LPAE_ENTRIES] __attribute__((__aligned__(4096))); +lpae_t __aligned(PAGE_SIZE) xen_fixmap[LPAE_ENTRIES]; /* First level page table used to map Xen itself with the XN bit set * as appropriate. */ -static lpae_t xen_xenmap[LPAE_ENTRIES] __attribute__((__aligned__(4096))); +static lpae_t __aligned(PAGE_SIZE) xen_xenmap[LPAE_ENTRIES]; /* Non-boot CPUs use this to find the correct pagetables. */ uint64_t init_ttbr;