| Message ID | 366b824864619d47572cd00cd62ef2c25dd513f7.1367188423.git.julien.grall@linaro.org |
|---|---|
| State | Changes Requested, archived |
| Headers | show |
On Mon, 2013-04-29 at 00:01 +0100, Julien Grall wrote: > This function routes an IRQ to a specific cpu. The IRQ is retrieved via > the device tree. > > Signed-off-by: Julien Grall <julien.grall@linaro.org> Acked-by: Ian Campbell <ian.campbell@citrix.com> > --- > xen/arch/arm/gic.c | 11 +++++++++++ > xen/include/asm-arm/gic.h | 5 +++++ > 2 files changed, 16 insertions(+) > > diff --git a/xen/arch/arm/gic.c b/xen/arch/arm/gic.c > index bac2af2..e03bb67 100644 > --- a/xen/arch/arm/gic.c > +++ b/xen/arch/arm/gic.c > @@ -238,6 +238,17 @@ static int gic_route_irq(unsigned int irq, bool_t level, > return 0; > } > > +/* Program the GIC to route an interrupt with a dt_irq */ > +void gic_route_dt_irq(const struct dt_irq *irq, unsigned int cpu_mask, > + unsigned int priority) > +{ > + bool_t level; > + > + level = irq_is_level_trigger(irq); > + > + gic_route_irq(irq->irq, level, cpu_mask, priority); > +} > + > static void __init gic_dist_init(void) > { > uint32_t type; > diff --git a/xen/include/asm-arm/gic.h b/xen/include/asm-arm/gic.h > index c3f87e1..2fac673 100644 > --- a/xen/include/asm-arm/gic.h > +++ b/xen/include/asm-arm/gic.h > @@ -133,6 +133,8 @@ > #define VGIC_IRQ_EVTCHN_CALLBACK 31 > > #ifndef __ASSEMBLY__ > +#include <xen/device_tree.h> > + > extern int domain_vgic_init(struct domain *d); > extern void domain_vgic_free(struct domain *d); > > @@ -141,6 +143,9 @@ extern int vcpu_vgic_init(struct vcpu *v); > extern void vgic_vcpu_inject_irq(struct vcpu *v, unsigned int irq,int virtual); > extern struct pending_irq *irq_to_pending(struct vcpu *v, unsigned int irq); > > +/* Program the GIC to route an interrupt with a dt_irq */ > +extern void gic_route_dt_irq(const struct dt_irq *irq, unsigned int cpu_mask, > + unsigned int priority); > extern void gic_route_ppis(void); > extern void gic_route_spis(void); >
diff --git a/xen/arch/arm/gic.c b/xen/arch/arm/gic.c index bac2af2..e03bb67 100644 --- a/xen/arch/arm/gic.c +++ b/xen/arch/arm/gic.c @@ -238,6 +238,17 @@ static int gic_route_irq(unsigned int irq, bool_t level, return 0; } +/* Program the GIC to route an interrupt with a dt_irq */ +void gic_route_dt_irq(const struct dt_irq *irq, unsigned int cpu_mask, + unsigned int priority) +{ + bool_t level; + + level = irq_is_level_trigger(irq); + + gic_route_irq(irq->irq, level, cpu_mask, priority); +} + static void __init gic_dist_init(void) { uint32_t type; diff --git a/xen/include/asm-arm/gic.h b/xen/include/asm-arm/gic.h index c3f87e1..2fac673 100644 --- a/xen/include/asm-arm/gic.h +++ b/xen/include/asm-arm/gic.h @@ -133,6 +133,8 @@ #define VGIC_IRQ_EVTCHN_CALLBACK 31 #ifndef __ASSEMBLY__ +#include <xen/device_tree.h> + extern int domain_vgic_init(struct domain *d); extern void domain_vgic_free(struct domain *d); @@ -141,6 +143,9 @@ extern int vcpu_vgic_init(struct vcpu *v); extern void vgic_vcpu_inject_irq(struct vcpu *v, unsigned int irq,int virtual); extern struct pending_irq *irq_to_pending(struct vcpu *v, unsigned int irq); +/* Program the GIC to route an interrupt with a dt_irq */ +extern void gic_route_dt_irq(const struct dt_irq *irq, unsigned int cpu_mask, + unsigned int priority); extern void gic_route_ppis(void); extern void gic_route_spis(void);
This function routes an IRQ to a specific cpu. The IRQ is retrieved via the device tree. Signed-off-by: Julien Grall <julien.grall@linaro.org> --- xen/arch/arm/gic.c | 11 +++++++++++ xen/include/asm-arm/gic.h | 5 +++++ 2 files changed, 16 insertions(+)