From patchwork Wed May 22 13:22:37 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mark Rutland X-Patchwork-Id: 164822 Delivered-To: patch@linaro.org Received: by 2002:a92:9e1a:0:0:0:0:0 with SMTP id q26csp860151ili; Wed, 22 May 2019 06:24:25 -0700 (PDT) X-Google-Smtp-Source: APXvYqyn0CE7liv8RVYQWSPPwbCVwxXSel4UMYrhrODI/QkFFmDDMZ+89eOqhX2SrGNOkSWDOk3I X-Received: by 2002:a17:902:5ac8:: with SMTP id g8mr62367456plm.154.1558531465474; Wed, 22 May 2019 06:24:25 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1558531465; cv=none; d=google.com; s=arc-20160816; b=kcF8/buNaf0J02akCPwf6Xau3c0tI2nt1MqVuxhekbHDpP52ANLxTSLZmHWT2wuMSi YUSLN12uMIlsR3DgqX7DC4AH+gmhOHa6oXnOQgk2Ubb/aODVwf/S6Ei4yu2tZJr9jNqP MJE+vauoyfntmFQ6LhOmJfvknP+G93AS03c2iWXuba2IOttA06Pc1IQehjIyhVyBRY+G 5+TOVa20lhLmLLcwd7BMMeGTC8ITAypp75T2HGzcq/yiCTBtp/e34UL84mMztQm1xUEc uomvDMoLUsvpaD0ciTlYd7/GLfklg4aokg7kG9LiZ+6DfVchUBtmOp1cWzYsk1ojhj3F cCqg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from; bh=xQZfYUn2NQaBPzMJ3jmfpDW9UrUuCMn3K75RxkRbJzM=; b=XJ0Z+ioACmtiCYbGF+le9MLIaf6KfXNIWAVOMWhyTOq2ctXIvtse/1cIqBg50wdQvj aKx25HD5JHybnHRf1nLHctZMcQltm6rKbW8OzYlMzwjOK+8rp2ip3hBc29l0qtB0Deyj DQE4X9RH/zLF4EbtPGOw8tMzROkXGJ7BAmMEAo4eONrA9zlK1/tTna5uoJ5/ha3B0iYV r/Y577IwUU++KeSKe9+ckKMwlAxVoBBgeyhUZCWz1p1prNVIrQlGu6zlpkomQGpsq7sf AFJaCjs7+g24DO8eGwCWOoWDQry8VQ/lflSqlM7udT3LhaCIN/sPjTKBUGtydEjM7G2l DeAQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id t24si25848037pga.495.2019.05.22.06.24.25; Wed, 22 May 2019 06:24:25 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729574AbfEVNYY (ORCPT + 30 others); Wed, 22 May 2019 09:24:24 -0400 Received: from foss.arm.com ([217.140.101.70]:50714 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729161AbfEVNYW (ORCPT ); Wed, 22 May 2019 09:24:22 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 836CD80D; Wed, 22 May 2019 06:24:21 -0700 (PDT) Received: from lakrids.cambridge.arm.com (usa-sjc-imap-foss1.foss.arm.com [10.72.51.249]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 438E03F575; Wed, 22 May 2019 06:24:17 -0700 (PDT) From: Mark Rutland To: linux-kernel@vger.kernel.org, peterz@infradead.org, will.deacon@arm.com Cc: aou@eecs.berkeley.edu, arnd@arndb.de, bp@alien8.de, catalin.marinas@arm.com, davem@davemloft.net, fenghua.yu@intel.com, heiko.carstens@de.ibm.com, herbert@gondor.apana.org.au, ink@jurassic.park.msu.ru, jhogan@kernel.org, linux@armlinux.org.uk, mark.rutland@arm.com, mattst88@gmail.com, mingo@kernel.org, mpe@ellerman.id.au, palmer@sifive.com, paul.burton@mips.com, paulus@samba.org, ralf@linux-mips.org, rth@twiddle.net, stable@vger.kernel.org, tglx@linutronix.de, tony.luck@intel.com, vgupta@synopsys.com Subject: [PATCH 05/18] locking/atomic: arc: use s64 for atomic64 Date: Wed, 22 May 2019 14:22:37 +0100 Message-Id: <20190522132250.26499-6-mark.rutland@arm.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20190522132250.26499-1-mark.rutland@arm.com> References: <20190522132250.26499-1-mark.rutland@arm.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org As a step towards making the atomic64 API use consistent types treewide, let's have the arc atomic64 implementation use s64 as the underlying type for atomic64_t, rather than u64, matching the generated headers. Otherwise, there should be no functional change as a result of this patch. Signed-off-by: Mark Rutland Cc: Peter Zijlstra Cc: Vineet Gupta Cc: Will Deacon --- arch/arc/include/asm/atomic.h | 41 ++++++++++++++++++++--------------------- 1 file changed, 20 insertions(+), 21 deletions(-) -- 2.11.0 diff --git a/arch/arc/include/asm/atomic.h b/arch/arc/include/asm/atomic.h index 158af079838d..2c75df55d0d2 100644 --- a/arch/arc/include/asm/atomic.h +++ b/arch/arc/include/asm/atomic.h @@ -324,14 +324,14 @@ ATOMIC_OPS(xor, ^=, CTOP_INST_AXOR_DI_R2_R2_R3) */ typedef struct { - aligned_u64 counter; + s64 __aligned(8) counter; } atomic64_t; #define ATOMIC64_INIT(a) { (a) } -static inline long long atomic64_read(const atomic64_t *v) +static inline s64 atomic64_read(const atomic64_t *v) { - unsigned long long val; + s64 val; __asm__ __volatile__( " ldd %0, [%1] \n" @@ -341,7 +341,7 @@ static inline long long atomic64_read(const atomic64_t *v) return val; } -static inline void atomic64_set(atomic64_t *v, long long a) +static inline void atomic64_set(atomic64_t *v, s64 a) { /* * This could have been a simple assignment in "C" but would need @@ -362,9 +362,9 @@ static inline void atomic64_set(atomic64_t *v, long long a) } #define ATOMIC64_OP(op, op1, op2) \ -static inline void atomic64_##op(long long a, atomic64_t *v) \ +static inline void atomic64_##op(s64 a, atomic64_t *v) \ { \ - unsigned long long val; \ + s64 val; \ \ __asm__ __volatile__( \ "1: \n" \ @@ -375,13 +375,13 @@ static inline void atomic64_##op(long long a, atomic64_t *v) \ " bnz 1b \n" \ : "=&r"(val) \ : "r"(&v->counter), "ir"(a) \ - : "cc"); \ + : "cc"); \ } \ #define ATOMIC64_OP_RETURN(op, op1, op2) \ -static inline long long atomic64_##op##_return(long long a, atomic64_t *v) \ +static inline s64 atomic64_##op##_return(s64 a, atomic64_t *v) \ { \ - unsigned long long val; \ + s64 val; \ \ smp_mb(); \ \ @@ -402,9 +402,9 @@ static inline long long atomic64_##op##_return(long long a, atomic64_t *v) \ } #define ATOMIC64_FETCH_OP(op, op1, op2) \ -static inline long long atomic64_fetch_##op(long long a, atomic64_t *v) \ +static inline s64 atomic64_fetch_##op(s64 a, atomic64_t *v) \ { \ - unsigned long long val, orig; \ + s64 val, orig; \ \ smp_mb(); \ \ @@ -444,10 +444,10 @@ ATOMIC64_OPS(xor, xor, xor) #undef ATOMIC64_OP_RETURN #undef ATOMIC64_OP -static inline long long -atomic64_cmpxchg(atomic64_t *ptr, long long expected, long long new) +static inline s64 +atomic64_cmpxchg(atomic64_t *ptr, s64 expected, s64 new) { - long long prev; + s64 prev; smp_mb(); @@ -467,9 +467,9 @@ atomic64_cmpxchg(atomic64_t *ptr, long long expected, long long new) return prev; } -static inline long long atomic64_xchg(atomic64_t *ptr, long long new) +static inline s64 atomic64_xchg(atomic64_t *ptr, s64 new) { - long long prev; + s64 prev; smp_mb(); @@ -495,9 +495,9 @@ static inline long long atomic64_xchg(atomic64_t *ptr, long long new) * the atomic variable, v, was not decremented. */ -static inline long long atomic64_dec_if_positive(atomic64_t *v) +static inline s64 atomic64_dec_if_positive(atomic64_t *v) { - long long val; + s64 val; smp_mb(); @@ -528,10 +528,9 @@ static inline long long atomic64_dec_if_positive(atomic64_t *v) * Atomically adds @a to @v, if it was not @u. * Returns the old value of @v */ -static inline long long atomic64_fetch_add_unless(atomic64_t *v, long long a, - long long u) +static inline s64 atomic64_fetch_add_unless(atomic64_t *v, s64 a, s64 u) { - long long old, temp; + s64 old, temp; smp_mb();