@@ -568,18 +568,35 @@
compatible = "arm,pl011", "arm,primecell";
reg = <0x80120000 0x1000>;
interrupts = <0 11 0x4>;
+
+ dmas = <&dma 13 0 0x2>, /* Logical - DevToMem */
+ <&dma 13 0 0x0>; /* Logical - MemToDev */
+ dma-names = "rx", "tx";
+
status = "disabled";
};
+
uart@80121000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x80121000 0x1000>;
interrupts = <0 19 0x4>;
+
+ dmas = <&dma 12 0 0x2>, /* Logical - DevToMem */
+ <&dma 12 0 0x0>; /* Logical - MemToDev */
+ dma-names = "rx", "tx";
+
status = "disabled";
};
+
uart@80007000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x80007000 0x1000>;
interrupts = <0 26 0x4>;
+
+ dmas = <&dma 11 0 0x2>, /* Logical - DevToMem */
+ <&dma 11 0 0x0>; /* Logical - MemToDev */
+ dma-names = "rx", "tx";
+
status = "disabled";
};