| Message ID | 20190625063140.17106-2-vkoul@kernel.org |
|---|---|
| State | Accepted |
| Commit | 4c45653b0b47a40c013362e17afd884301ad14c1 |
| Headers | show |
| Series | clk: qcom: Add support for SM8150 GCC | expand |
Quoting Vinod Koul (2019-06-24 23:31:38) > We want users to code properly and fix the post_div_table missing and > not reply on core to check. So remove the post_div_table check. > > Signed-off-by: Vinod Koul <vkoul@kernel.org> > Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> > --- This doesn't apply. Not sure why. Can you please format-patch with --base= so I can know what baseline commit you've based your patches on? Helps me avoid needing to ask, like right now.
On 27-06-19, 14:37, Stephen Boyd wrote: > Quoting Vinod Koul (2019-06-24 23:31:38) > > We want users to code properly and fix the post_div_table missing and > > not reply on core to check. So remove the post_div_table check. > > > > Signed-off-by: Vinod Koul <vkoul@kernel.org> > > Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> > > --- > > This doesn't apply. Not sure why. Can you please format-patch with I had rebased it on clk-next, but that was v2, let me rebase > --base= so I can know what baseline commit you've based your patches on? > Helps me avoid needing to ask, like right now. Sure will do that and repost after rebase. Also the patch fix for DIV_ROUND_DOWN_ULL has been merged to mm tree, will add that as well. Thanks -- ~Vinod
On Mon 24 Jun 23:31 PDT 2019, Vinod Koul wrote: > We want users to code properly and fix the post_div_table missing and > not reply on core to check. So remove the post_div_table check. s/reply/rely/ > > Signed-off-by: Vinod Koul <vkoul@kernel.org> > Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> > --- > drivers/clk/qcom/clk-alpha-pll.c | 15 --------------- > 1 file changed, 15 deletions(-) > > diff --git a/drivers/clk/qcom/clk-alpha-pll.c b/drivers/clk/qcom/clk-alpha-pll.c > index b48707693ffd..2c6773188761 100644 > --- a/drivers/clk/qcom/clk-alpha-pll.c > +++ b/drivers/clk/qcom/clk-alpha-pll.c > @@ -1036,11 +1036,6 @@ static unsigned long clk_alpha_pll_postdiv_fabia_recalc_rate(struct clk_hw *hw, > u32 i, div = 1, val; > int ret; > > - if (!pll->post_div_table) { > - pr_err("Missing the post_div_table for the PLL\n"); > - return -EINVAL; > - } > - > ret = regmap_read(pll->clkr.regmap, PLL_USER_CTL(pll), &val); > if (ret) > return ret; > @@ -1063,11 +1058,6 @@ static long clk_alpha_pll_postdiv_fabia_round_rate(struct clk_hw *hw, > { > struct clk_alpha_pll_postdiv *pll = to_clk_alpha_pll_postdiv(hw); > > - if (!pll->post_div_table) { > - pr_err("Missing the post_div_table for the PLL\n"); > - return -EINVAL; > - } > - > return divider_round_rate(hw, rate, prate, pll->post_div_table, > pll->width, CLK_DIVIDER_ROUND_CLOSEST); > } > @@ -1089,11 +1079,6 @@ static int clk_alpha_pll_postdiv_fabia_set_rate(struct clk_hw *hw, > if (val & PLL_VOTE_FSM_ENA) > return 0; > > - if (!pll->post_div_table) { > - pr_err("Missing the post_div_table for the PLL\n"); > - return -EINVAL; > - } > - > div = DIV_ROUND_UP_ULL(parent_rate, rate); > for (i = 0; i < pll->num_post_div; i++) { > if (pll->post_div_table[i].div == div) { > -- > 2.20.1 >
On 15-07-19, 17:08, Bjorn Andersson wrote: > On Mon 24 Jun 23:31 PDT 2019, Vinod Koul wrote: > > > We want users to code properly and fix the post_div_table missing and > > not reply on core to check. So remove the post_div_table check. > > s/reply/rely/ Thanks for pointing, will update -- ~Vinod
diff --git a/drivers/clk/qcom/clk-alpha-pll.c b/drivers/clk/qcom/clk-alpha-pll.c index b48707693ffd..2c6773188761 100644 --- a/drivers/clk/qcom/clk-alpha-pll.c +++ b/drivers/clk/qcom/clk-alpha-pll.c @@ -1036,11 +1036,6 @@ static unsigned long clk_alpha_pll_postdiv_fabia_recalc_rate(struct clk_hw *hw, u32 i, div = 1, val; int ret; - if (!pll->post_div_table) { - pr_err("Missing the post_div_table for the PLL\n"); - return -EINVAL; - } - ret = regmap_read(pll->clkr.regmap, PLL_USER_CTL(pll), &val); if (ret) return ret; @@ -1063,11 +1058,6 @@ static long clk_alpha_pll_postdiv_fabia_round_rate(struct clk_hw *hw, { struct clk_alpha_pll_postdiv *pll = to_clk_alpha_pll_postdiv(hw); - if (!pll->post_div_table) { - pr_err("Missing the post_div_table for the PLL\n"); - return -EINVAL; - } - return divider_round_rate(hw, rate, prate, pll->post_div_table, pll->width, CLK_DIVIDER_ROUND_CLOSEST); } @@ -1089,11 +1079,6 @@ static int clk_alpha_pll_postdiv_fabia_set_rate(struct clk_hw *hw, if (val & PLL_VOTE_FSM_ENA) return 0; - if (!pll->post_div_table) { - pr_err("Missing the post_div_table for the PLL\n"); - return -EINVAL; - } - div = DIV_ROUND_UP_ULL(parent_rate, rate); for (i = 0; i < pll->num_post_div; i++) { if (pll->post_div_table[i].div == div) {