diff mbox

[V3,39/41] xen/arm: Add platform specific code for the exynos5

Message ID 1368152307-598-40-git-send-email-julien.grall@linaro.org
State Superseded, archived
Headers show

Commit Message

Julien Grall May 10, 2013, 2:18 a.m. UTC
Signed-off-by: Julien Grall <julien.grall@linaro.org>

Changes in v3:
    - Remove hard tab
    - Typoes
    - Replace platform_{read,write} call to ioremap_attr, ioreadl, iowritel

Changes in v2:
    - Add dom0 1:1 mapping quirk for the arndale board
    - s/mapping/mappings/ in comment
    - Remove debug trap (unnecessary with linux 3.9)
---
 xen/arch/arm/platforms/Makefile         |    1 +
 xen/arch/arm/platforms/exynos5.c        |  110 +++++++++++++++++++++++++++++++
 xen/include/asm-arm/platforms/exynos5.h |   39 +++++++++++
 3 files changed, 150 insertions(+)
 create mode 100644 xen/arch/arm/platforms/exynos5.c
 create mode 100644 xen/include/asm-arm/platforms/exynos5.h

Comments

Ian Campbell May 10, 2013, 9:50 a.m. UTC | #1
On Fri, 2013-05-10 at 03:18 +0100, Julien Grall wrote:
> Signed-off-by: Julien Grall <julien.grall@linaro.org>

Acked-by: Ian Campbell <ian.campbell@citrix.com>
diff mbox

Patch

diff --git a/xen/arch/arm/platforms/Makefile b/xen/arch/arm/platforms/Makefile
index 4313e95..ff2b65b 100644
--- a/xen/arch/arm/platforms/Makefile
+++ b/xen/arch/arm/platforms/Makefile
@@ -1 +1,2 @@ 
 obj-y += vexpress.o
+obj-y += exynos5.o
diff --git a/xen/arch/arm/platforms/exynos5.c b/xen/arch/arm/platforms/exynos5.c
new file mode 100644
index 0000000..513a7be
--- /dev/null
+++ b/xen/arch/arm/platforms/exynos5.c
@@ -0,0 +1,110 @@ 
+/*
+ * xen/arch/arm/platforms/exynos5.c
+ *
+ * Exynos5 specific settings
+ *
+ * Julien Grall <julien.grall@linaro.org>
+ * Copyright (c) 2013 Linaro Limited.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <asm/p2m.h>
+#include <xen/config.h>
+#include <xen/device_tree.h>
+#include <xen/domain_page.h>
+#include <xen/mm.h>
+#include <xen/vmap.h>
+#include <asm/platforms/exynos5.h>
+#include <asm/platform.h>
+
+static int exynos5_init_time(void)
+{
+    uint32_t reg;
+    void __iomem *mct;
+
+    BUILD_BUG_ON(EXYNOS5_MCT_G_TCON >= PAGE_SIZE);
+
+    mct = ioremap_attr(EXYNOS5_MCT_BASE, PAGE_SIZE, PAGE_HYPERVISOR_NOCACHE);
+    if ( !mct )
+    {
+        dprintk(XENLOG_ERR, "Unable to map MCT\n");
+        return -ENOMEM;
+    }
+
+    /* Enable timer on Exynos 5250 should probably be done by u-boot */
+    reg = ioreadl(mct + EXYNOS5_MCT_G_TCON);
+    iowritel(mct + EXYNOS5_MCT_G_TCON, reg | EXYNOS5_MCT_G_TCON_START);
+
+    iounmap(mct);
+
+    return 0;
+}
+
+/* Additional mappings for dom0 (Not in the DTS) */
+static int exynos5_specific_mapping(struct domain *d)
+{
+    /* Map the chip ID */
+    map_mmio_regions(d, EXYNOS5_PA_CHIPID, EXYNOS5_PA_CHIPID + PAGE_SIZE - 1,
+                     EXYNOS5_PA_CHIPID);
+
+    /* Map the PWM region */
+    map_mmio_regions(d, EXYNOS5_PA_TIMER,
+                     EXYNOS5_PA_TIMER + (PAGE_SIZE * 2) - 1,
+                     EXYNOS5_PA_TIMER);
+
+    return 0;
+}
+
+static void exynos5_reset(void)
+{
+    void __iomem *pmu;
+
+    BUILD_BUG_ON(EXYNOS5_SWRESET >= PAGE_SIZE);
+
+    pmu = ioremap_attr(EXYNOS5_PA_PMU, PAGE_SIZE, PAGE_HYPERVISOR_NOCACHE);
+    if ( !pmu )
+    {
+        dprintk(XENLOG_ERR, "Unable to map PMU\n");
+        return;
+    }
+
+    iowritel(pmu + EXYNOS5_SWRESET, 1);
+    iounmap(pmu);
+}
+
+static uint32_t exynos5_quirks(void)
+{
+    return PLATFORM_QUIRK_DOM0_MAPPING_11;
+}
+
+static const char const *exynos5_dt_compat[] __initdata =
+{
+    "samsung,exynos5250",
+    NULL
+};
+
+PLATFORM_START(exynos5, "SAMSUNG EXYNOS5")
+    .compatible = exynos5_dt_compat,
+    .init_time = exynos5_init_time,
+    .specific_mapping = exynos5_specific_mapping,
+    .reset = exynos5_reset,
+    .quirks = exynos5_quirks,
+PLATFORM_END
+
+/*
+ * Local variables:
+ * mode: C
+ * c-file-style: "BSD"
+ * c-basic-offset: 4
+ * indent-tabs-mode: nil
+ * End:
+ */
diff --git a/xen/include/asm-arm/platforms/exynos5.h b/xen/include/asm-arm/platforms/exynos5.h
new file mode 100644
index 0000000..ee5bdfa
--- /dev/null
+++ b/xen/include/asm-arm/platforms/exynos5.h
@@ -0,0 +1,39 @@ 
+#ifndef __ASM_ARM_PLATFORMS_EXYNOS5_H
+#define __ASM_ASM_PLATFORMS_EXYSNO5_H
+
+#define EXYNOS5_MCT_BASE            0x101c0000
+#define EXYNOS5_MCT_G_TCON          0x240       /* Relative to MCT_BASE */
+#define EXYNOS5_MCT_G_TCON_START    (1 << 8)
+
+#define EXYNOS5_PA_CHIPID           0x10000000
+#define EXYNOS5_PA_TIMER            0x12dd0000
+/* Base address of system controller */
+#define EXYNOS5_PA_PMU              0x10040000
+
+#define EXYNOS5_SWRESET             0x0400      /* Relative to PA_PMU */
+
+#define S5P_PA_SYSRAM   0x02020000
+
+/* Constants below is only used in assembly because the DTS is not yet parsed */
+#ifdef __ASSEMBLY__
+
+/* GIC Base Address */
+#define EXYNOS5_GIC_BASE_ADDRESS    0x10480000
+
+/* Timer's frequency */
+#define EXYNOS5_TIMER_FREQUENCY     (24 * 1000 * 1000) /* 24 MHz */
+
+/* Arndale machine ID */
+#define MACH_TYPE_SMDK5250          3774
+
+#endif /* __ASSEMBLY__ */
+
+#endif /* __ASM_ARM_PLATFORMS_EXYNOS5_H */
+/*
+ * Local variables:
+ * mode: C
+ * c-file-style: "BSD"
+ * c-basic-offset: 4
+ * indent-tabs-mode: nil
+ * End:
+ */