diff mbox series

gpio: xlp: Pass irqchip when adding gpiochip

Message ID 20190809135119.6946-1-linus.walleij@linaro.org
State Accepted
Commit c7e66e48c05ac2de729999148daa56b563c30b2f
Headers show
Series gpio: xlp: Pass irqchip when adding gpiochip | expand

Commit Message

Linus Walleij Aug. 9, 2019, 1:51 p.m. UTC 
We need to convert all old gpio irqchips to pass the irqchip
setup along when adding the gpio_chip. For more info see
drivers/gpio/TODO.

For chained irqchips this is a pretty straight-forward
conversion.

Cc: Jayachandran C <jnair@caviumnetworks.com>
Cc: Kamlakant Patel <kamlakant.patel@broadcom.com>
Cc: Thierry Reding <treding@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

---
 drivers/gpio/gpio-xlp.c | 29 +++++++++++++++--------------
 1 file changed, 15 insertions(+), 14 deletions(-)

-- 
2.21.0

Comments

Linus Walleij Aug. 15, 2019, 7:56 a.m. UTC | #1 
On Fri, Aug 9, 2019 at 3:51 PM Linus Walleij <linus.walleij@linaro.org> wrote:

> We need to convert all old gpio irqchips to pass the irqchip

> setup along when adding the gpio_chip. For more info see

> drivers/gpio/TODO.

>

> For chained irqchips this is a pretty straight-forward

> conversion.

>

> Cc: Jayachandran C <jnair@caviumnetworks.com>

> Cc: Kamlakant Patel <kamlakant.patel@broadcom.com>

> Cc: Thierry Reding <treding@nvidia.com>

> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>


All maintainers mail addresses are bouncing so I just
applied the patch.

Yours,
Linus Walleij
diff mbox series

Patch

diff --git a/drivers/gpio/gpio-xlp.c b/drivers/gpio/gpio-xlp.c
index 54d3359444f3..d7b16bb9e4e4 100644
--- a/drivers/gpio/gpio-xlp.c
+++ b/drivers/gpio/gpio-xlp.c
@@ -290,6 +290,7 @@  MODULE_DEVICE_TABLE(of, xlp_gpio_of_ids);
 static int xlp_gpio_probe(struct platform_device *pdev)
 {
 	struct gpio_chip *gc;
+	struct gpio_irq_chip *girq;
 	struct xlp_gpio_priv *priv;
 	void __iomem *gpio_base;
 	int irq_base, irq, err;
@@ -395,27 +396,27 @@  static int xlp_gpio_probe(struct platform_device *pdev)
 		irq_base = 0;
 	}
 
+	girq = &gc->irq;
+	girq->chip = &xlp_gpio_irq_chip;
+	girq->parent_handler = xlp_gpio_generic_handler;
+	girq->num_parents = 1;
+	girq->parents = devm_kcalloc(&pdev->dev, 1,
+				     sizeof(*girq->parents),
+				     GFP_KERNEL);
+	if (!girq->parents)
+		return -ENOMEM;
+	girq->parents[0] = irq;
+	girq->first = irq_base;
+	girq->default_type = IRQ_TYPE_NONE;
+	girq->handler = handle_level_irq;
+
 	err = gpiochip_add_data(gc, priv);
 	if (err < 0)
 		return err;
 
-	err = gpiochip_irqchip_add(gc, &xlp_gpio_irq_chip, irq_base,
-				handle_level_irq, IRQ_TYPE_NONE);
-	if (err) {
-		dev_err(&pdev->dev, "Could not connect irqchip to gpiochip!\n");
-		goto out_gpio_remove;
-	}
-
-	gpiochip_set_chained_irqchip(gc, &xlp_gpio_irq_chip, irq,
-			xlp_gpio_generic_handler);
-
 	dev_info(&pdev->dev, "registered %d GPIOs\n", gc->ngpio);
 
 	return 0;
-
-out_gpio_remove:
-	gpiochip_remove(gc);
-	return err;
 }
 
 #ifdef CONFIG_ACPI