| Message ID | 20190812123253.4734-2-jbrunet@baylibre.com |
|---|---|
| State | Accepted |
| Commit | 0688587a71200911721a0cb025fe805ddc0404b6 |
| Headers | show |
| Series | clk: meson: axg-audio: add reset support | expand |
On 12/08/2019 14:32, Jerome Brunet wrote: > Add the documentation and bindings for the resets provided by the g12a > audio clock controller > > Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> > --- > .../bindings/clock/amlogic,axg-audio-clkc.txt | 1 + > .../reset/amlogic,meson-g12a-audio-reset.h | 38 +++++++++++++++++++ > 2 files changed, 39 insertions(+) > create mode 100644 include/dt-bindings/reset/amlogic,meson-g12a-audio-reset.h > > diff --git a/Documentation/devicetree/bindings/clock/amlogic,axg-audio-clkc.txt b/Documentation/devicetree/bindings/clock/amlogic,axg-audio-clkc.txt > index 0f777749f4f1..b3957d10d241 100644 > --- a/Documentation/devicetree/bindings/clock/amlogic,axg-audio-clkc.txt > +++ b/Documentation/devicetree/bindings/clock/amlogic,axg-audio-clkc.txt > @@ -22,6 +22,7 @@ Required Properties: > components. > - resets : phandle of the internal reset line > - #clock-cells : should be 1. > +- #reset-cells : should be 1 on the g12a (and following) soc family > > Each clock is assigned an identifier and client nodes can use this identifier > to specify the clock which they consume. All available clocks are defined as > diff --git a/include/dt-bindings/reset/amlogic,meson-g12a-audio-reset.h b/include/dt-bindings/reset/amlogic,meson-g12a-audio-reset.h > new file mode 100644 > index 000000000000..14b78dabed0e > --- /dev/null > +++ b/include/dt-bindings/reset/amlogic,meson-g12a-audio-reset.h > @@ -0,0 +1,38 @@ > +/* SPDX-License-Identifier: GPL-2.0 */ > +/* > + * Copyright (c) 2019 BayLibre, SAS. > + * Author: Jerome Brunet <jbrunet@baylibre.com> > + * > + */ > + > +#ifndef _DT_BINDINGS_AMLOGIC_MESON_G12A_AUDIO_RESET_H > +#define _DT_BINDINGS_AMLOGIC_MESON_G12A_AUDIO_RESET_H > + > +#define AUD_RESET_PDM 0 > +#define AUD_RESET_TDMIN_A 1 > +#define AUD_RESET_TDMIN_B 2 > +#define AUD_RESET_TDMIN_C 3 > +#define AUD_RESET_TDMIN_LB 4 > +#define AUD_RESET_LOOPBACK 5 > +#define AUD_RESET_TODDR_A 6 > +#define AUD_RESET_TODDR_B 7 > +#define AUD_RESET_TODDR_C 8 > +#define AUD_RESET_FRDDR_A 9 > +#define AUD_RESET_FRDDR_B 10 > +#define AUD_RESET_FRDDR_C 11 > +#define AUD_RESET_TDMOUT_A 12 > +#define AUD_RESET_TDMOUT_B 13 > +#define AUD_RESET_TDMOUT_C 14 > +#define AUD_RESET_SPDIFOUT 15 > +#define AUD_RESET_SPDIFOUT_B 16 > +#define AUD_RESET_SPDIFIN 17 > +#define AUD_RESET_EQDRC 18 > +#define AUD_RESET_RESAMPLE 19 > +#define AUD_RESET_DDRARB 20 > +#define AUD_RESET_POWDET 21 > +#define AUD_RESET_TORAM 22 > +#define AUD_RESET_TOACODEC 23 > +#define AUD_RESET_TOHDMITX 24 > +#define AUD_RESET_CLKTREE 25 > + > +#endif > Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
diff --git a/Documentation/devicetree/bindings/clock/amlogic,axg-audio-clkc.txt b/Documentation/devicetree/bindings/clock/amlogic,axg-audio-clkc.txt index 0f777749f4f1..b3957d10d241 100644 --- a/Documentation/devicetree/bindings/clock/amlogic,axg-audio-clkc.txt +++ b/Documentation/devicetree/bindings/clock/amlogic,axg-audio-clkc.txt @@ -22,6 +22,7 @@ Required Properties: components. - resets : phandle of the internal reset line - #clock-cells : should be 1. +- #reset-cells : should be 1 on the g12a (and following) soc family Each clock is assigned an identifier and client nodes can use this identifier to specify the clock which they consume. All available clocks are defined as diff --git a/include/dt-bindings/reset/amlogic,meson-g12a-audio-reset.h b/include/dt-bindings/reset/amlogic,meson-g12a-audio-reset.h new file mode 100644 index 000000000000..14b78dabed0e --- /dev/null +++ b/include/dt-bindings/reset/amlogic,meson-g12a-audio-reset.h @@ -0,0 +1,38 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (c) 2019 BayLibre, SAS. + * Author: Jerome Brunet <jbrunet@baylibre.com> + * + */ + +#ifndef _DT_BINDINGS_AMLOGIC_MESON_G12A_AUDIO_RESET_H +#define _DT_BINDINGS_AMLOGIC_MESON_G12A_AUDIO_RESET_H + +#define AUD_RESET_PDM 0 +#define AUD_RESET_TDMIN_A 1 +#define AUD_RESET_TDMIN_B 2 +#define AUD_RESET_TDMIN_C 3 +#define AUD_RESET_TDMIN_LB 4 +#define AUD_RESET_LOOPBACK 5 +#define AUD_RESET_TODDR_A 6 +#define AUD_RESET_TODDR_B 7 +#define AUD_RESET_TODDR_C 8 +#define AUD_RESET_FRDDR_A 9 +#define AUD_RESET_FRDDR_B 10 +#define AUD_RESET_FRDDR_C 11 +#define AUD_RESET_TDMOUT_A 12 +#define AUD_RESET_TDMOUT_B 13 +#define AUD_RESET_TDMOUT_C 14 +#define AUD_RESET_SPDIFOUT 15 +#define AUD_RESET_SPDIFOUT_B 16 +#define AUD_RESET_SPDIFIN 17 +#define AUD_RESET_EQDRC 18 +#define AUD_RESET_RESAMPLE 19 +#define AUD_RESET_DDRARB 20 +#define AUD_RESET_POWDET 21 +#define AUD_RESET_TORAM 22 +#define AUD_RESET_TOACODEC 23 +#define AUD_RESET_TOHDMITX 24 +#define AUD_RESET_CLKTREE 25 + +#endif
Add the documentation and bindings for the resets provided by the g12a audio clock controller Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> --- .../bindings/clock/amlogic,axg-audio-clkc.txt | 1 + .../reset/amlogic,meson-g12a-audio-reset.h | 38 +++++++++++++++++++ 2 files changed, 39 insertions(+) create mode 100644 include/dt-bindings/reset/amlogic,meson-g12a-audio-reset.h -- 2.21.0