diff mbox series

[3/6] drm/amdgpu: display_mode_vba_21: remove uint typedef

Message ID 20191002120136.1777161-4-arnd@arndb.de
State Accepted
Commit beda921dbc99ce240ae88e2c9740c99c354c7ca2
Headers show
Series [1/6] drm/amdgpu: make pmu support optional, again | expand

Commit Message

Arnd Bergmann Oct. 2, 2019, 12:01 p.m. UTC 
The type definition for 'uint' clashes with the generic kernel
headers:

drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn21/display_mode_vba_21.c:43:22: error: redefinition of typedef 'uint' is a C11 feature [-Werror,-Wtypedef-redefinition]
include/linux/types.h:92:23: note: previous definition is here

Just remove this type and use plain 'unsigned int' consistently,
as it is already use almost everywhere in this file.

Fixes: b04641a3f4c5 ("drm/amd/display: Add Renoir DML")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
---
 .../amd/display/dc/dml/dcn21/display_mode_vba_21.c  | 13 +++++--------
 1 file changed, 5 insertions(+), 8 deletions(-)
diff mbox series

Patch

diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c b/drivers/gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c
index 46cda85d3d63..998970e2f84c 100644
--- a/drivers/gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c
+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c
@@ -39,9 +39,6 @@ 
  * ways. Unless there is something clearly wrong with it the code should
  * remain as-is as it provides us with a guarantee from HW that it is correct.
  */
-
-typedef unsigned int uint;
-
 typedef struct {
 	amdgpu_dc_double DPPCLK;
 	amdgpu_dc_double DISPCLK;
@@ -4774,7 +4771,7 @@  void dml21_ModeSupportAndSystemConfigurationFull(struct display_mode_lib *mode_l
 				mode_lib->vba.MaximumReadBandwidthWithoutPrefetch = 0.0;
 				mode_lib->vba.MaximumReadBandwidthWithPrefetch = 0.0;
 				for (k = 0; k <= mode_lib->vba.NumberOfActivePlanes - 1; k++) {
-					uint m;
+					unsigned int m;
 
 					locals->cursor_bw[k] = 0;
 					locals->cursor_bw_pre[k] = 0;
@@ -5285,7 +5282,7 @@  static void CalculateWatermarksAndDRAMSpeedChangeSupport(
 	amdgpu_dc_double SecondMinActiveDRAMClockChangeMarginOneDisplayInVBLank;
 	amdgpu_dc_double FullDETBufferingTimeYStutterCriticalPlane = 0;
 	amdgpu_dc_double TimeToFinishSwathTransferStutterCriticalPlane = 0;
-	uint k, j;
+	unsigned int k, j;
 
 	mode_lib->vba.TotalActiveDPP = 0;
 	mode_lib->vba.TotalDCCActiveDPP = 0;
@@ -5507,7 +5504,7 @@  static void CalculateDCFCLKDeepSleep(
 		amdgpu_dc_double DPPCLK[],
 		amdgpu_dc_double *DCFCLKDeepSleep)
 {
-	uint k;
+	unsigned int k;
 	amdgpu_dc_double DisplayPipeLineDeliveryTimeLuma;
 	amdgpu_dc_double DisplayPipeLineDeliveryTimeChroma;
 	//amdgpu_dc_double   DCFCLKDeepSleepPerPlane[DC__NUM_DPP__MAX];
@@ -5727,7 +5724,7 @@  static void CalculatePixelDeliveryTimes(
 		amdgpu_dc_double DisplayPipeRequestDeliveryTimeChromaPrefetch[])
 {
 	amdgpu_dc_double req_per_swath_ub;
-	uint k;
+	unsigned int k;
 
 	for (k = 0; k < NumberOfActivePlanes; ++k) {
 		if (VRatio[k] <= 1) {
@@ -5869,7 +5866,7 @@  static void CalculateMetaAndPTETimes(
 	unsigned int dpte_groups_per_row_chroma_ub;
 	unsigned int num_group_per_lower_vm_stage;
 	unsigned int num_req_per_lower_vm_stage;
-	uint k;
+	unsigned int k;
 
 	for (k = 0; k < NumberOfActivePlanes; ++k) {
 		if (GPUVMEnable == true) {